SPRK066 October   2025 F28377D-SEP

 

  1.   1
  2.   F28377D-SEP Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Single-Event Effects (SEE)
  6. 3Device and Test Board Information
  7. 4Irradiation Facility and Setup
  8. 5Depth, Range, and LETEFF Calculation
  9. 6Test Setup and Procedures
  10. 7Destructive Single-Event Effects (DSEE)
    1. 7.1 Single-Event Latch-up (SEL) Results
  11. 8Single-Event Transients (SET)
    1. 8.1 GPIO Testing and Results
      1. 8.1.1 GPIO Test Setup
      2. 8.1.2 GPIO SET Analysis
      3. 8.1.3 GPIO SET Summary
    2. 8.2 ePWM Testing and Results
      1. 8.2.1 ePWM Testing Setup
      2. 8.2.2 ePWM SET Analysis
      3. 8.2.3 ePWM SET Summary
    3. 8.3 SRAM Testing and Results
      1. 8.3.1 SRAM Test Setup
      2. 8.3.2 SRAM SET Summary
    4. 8.4 Flash Memory Testing and Results
      1. 8.4.1 Flash Test Setup
      2. 8.4.2 Flash SET Summary
  12. 9Summary
  13.   A Total Ionizing Dose from SEE Experiments
  14.   B References

8 Single-Event Transients (SET)

SET are defined as heavy-ion-induced transients upsets effecting the logic and/or outputs of the F28377D-SEP device.

Testing was performed at room temperature (no external temperature control applied). The heavy-ions species used for the SET testing were Silver (109Ag),and Argon(40Ar) for an LETEFF = 45MeV·cm2/m and 8MeV·cm2/m respectively for more details refer to Ion LETEFF, Depth, and Range in Silicon. Flux of ≅104 ions×cm2/s and a fluence of ≅106 ions/cm2, per run were used for the SET's characterization discussed on this chapter.

The following logic on the F28377D-SEP was tested for SET:

  • GPIO input and output
  • ePWM output
  • SRAM
  • Flash

Two Saleae Logic Pro 16 Logic Analyzers were used to capture relevant data, in addition data was also exported via the console of Code Composer Studio IDE for certain tests.