SPRK066 October   2025 F28377D-SEP

 

  1.   1
  2.   F28377D-SEP Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Single-Event Effects (SEE)
  6. 3Device and Test Board Information
  7. 4Irradiation Facility and Setup
  8. 5Depth, Range, and LETEFF Calculation
  9. 6Test Setup and Procedures
  10. 7Destructive Single-Event Effects (DSEE)
    1. 7.1 Single-Event Latch-up (SEL) Results
  11. 8Single-Event Transients (SET)
    1. 8.1 GPIO Testing and Results
      1. 8.1.1 GPIO Test Setup
      2. 8.1.2 GPIO SET Analysis
      3. 8.1.3 GPIO SET Summary
    2. 8.2 ePWM Testing and Results
      1. 8.2.1 ePWM Testing Setup
      2. 8.2.2 ePWM SET Analysis
      3. 8.2.3 ePWM SET Summary
    3. 8.3 SRAM Testing and Results
      1. 8.3.1 SRAM Test Setup
      2. 8.3.2 SRAM SET Summary
    4. 8.4 Flash Memory Testing and Results
      1. 8.4.1 Flash Test Setup
      2. 8.4.2 Flash SET Summary
  12. 9Summary
  13.   A Total Ionizing Dose from SEE Experiments
  14.   B References

3 Device and Test Board Information

The F28377D-SEP is packaged in a 176-pin plastic package as shown in Figure 3-1. The F28377D-SEP evaluation module(EVM) was used to evaluate the performance and characteristics of the F28377D-SEP under heavy ion radiation. The F28377D-SEP EVM is shown in Figure 3-2. The schematic is shown in Figure 3-3.

TMS320F38377D-SEP Photograph of Delidded F28377D-SEP[Left] and Pinout Diagram [Right] Figure 3-1 Photograph of Delidded F28377D-SEP[Left] and Pinout Diagram [Right]
Note: The package was delidded/decapped to reveal the die face for all heavy-ion testing.
Figure 3-2 F28377D-SEP EVM Top View
TMS320F38377D-SEP
TMS320F38377D-SEP F28377D-SEP EVM Schematics Figure 3-3 F28377D-SEP EVM Schematics