SPRUIY9B May   2021  – October 2023

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Key Features
  5. 2EVM Revisions and Assembly Variants
  6. 3Important Usage Notes
  7. 4System Description
    1. 4.1 Key Features
    2. 4.2 Functional Block Diagram
    3. 4.3 Power-On/Off Procedures
      1. 4.3.1 Power-On Procedure
      2. 4.3.2 Power-Off Procedure
    4. 4.4 Peripheral and Major Component Description
      1. 4.4.1  Clocking
        1. 4.4.1.1 Ethernet PHY Clock
        2. 4.4.1.2 AM64x SoC Clock
      2. 4.4.2  Reset
      3. 4.4.3  Power
        1. 4.4.3.1 Power Input
        2. 4.4.3.2 USB Type-C Interface for Power Input
        3. 4.4.3.3 Power Fault Indication
        4. 4.4.3.4 Power Supply
        5. 4.4.3.5 Power Sequencing
        6. 4.4.3.6 Power Supply
      4. 4.4.4  Configuration
        1. 4.4.4.1 Boot Modes
      5. 4.4.5  JTAG
      6. 4.4.6  Test Automation
      7. 4.4.7  UART Interface
      8. 4.4.8  Memory Interfaces
        1. 4.4.8.1 LPDDR4 Interface
        2. 4.4.8.2 MMC Interface
          1. 4.4.8.2.1 Micro SD Interface
          2. 4.4.8.2.2 WiLink Interface
          3. 4.4.8.2.3 OSPI Interface
          4. 4.4.8.2.4 Board ID EEPROM Interface
      9. 4.4.9  Ethernet Interface
        1. 4.4.9.1 DP83867 PHY Default Configuration
        2. 4.4.9.2 DP83867 – Power, Clock, Reset, Interrupt and LEDs
        3. 4.4.9.3 Industrial Application LEDs
      10. 4.4.10 USB 3.0 Interface
      11. 4.4.11 PRU Connector
      12. 4.4.12 User Expansion Connector
      13. 4.4.13 MCU Connector
      14. 4.4.14 Interrupt
      15. 4.4.15 I2C Interface
      16. 4.4.16 IO Expander (GPIOs)
  8. 5Known Issues
    1. 5.1 Issue 1: LP8733x Max output Capacitance Spec Exceeded on LDO0 and LDO1
    2. 5.2 Issue 2: LP8733x Output Voltage of 0.9V Exceeds AM64x VDDR_CORE max Voltage Spec of 0.895 V
    3. 5.3 Issue 3 - SDIO Devices on MMC0 Require Careful Trace Lengths to Meet Interface Timing Requirements
    4. 5.4 Issue 4 - LPDDR4 Data Rate Limitation in Stressful Conditions
    5. 5.5 Issue 5 - Junk Character
    6. 5.6 Issue 6 - Test Power Down Signal Floating
    7. 5.7 Issue 7 - uSD Boot Not Working
  9. 6Regulatory Compliance
  10. 7Revision History

USB Type-C Interface for Power Input

The AM64x SKEVM is powered through a USB type-C Connector. The USB Type-C source is capable of providing 3 A at 5 V and advertises the current sourcing capability through CC1 and CC2 signals. On SK EVM, CC1 and CC2 from the USB Type-C connector are interfaced to the TUSB320LAIRWBR port controller IC. This device uses the CC pins to determine port attach and detach, cable orientation, role detection, and port control for Type-C current mode. This IC allows for pin swapping when the Type-C cable is flipped and inserted. The CC logic block monitors the CC1 and CC2 pins for pull-up or pull-down resistances to determine when a USB port has been attached, the orientation of the cable, and the role detected. The CC logic detects the Type-C current mode as default, medium, or high depending on the role detected. Pin PORT is pulled down to ground through a resistor to configure as UFP (Upward Facing Port) mode. VBUS detection is implemented to determine a successful attach in UFP mode. Pin ADDR is left open to configure as GPIO mode. OUT1 and OUT2 pin is connected to a NOR gate. Active low on both OUT1 and OUT2 pin advertises high current (3 A) in the attached state which enables the VUSB_MAIN power switch to provide the VUSB_PMIC supply which powers one PMIC. In UFP mode, the TUSB320 device constantly presents pull-down resistors (Rd) on both CC pins. The TUSB320 device monitors the CC pins for the voltage level corresponding to the Type-C mode current advertisement by the connected DFP. The TUSB320 device de-bounces the CC pins and waits for VBUS detection before successfully attaching. As a UFP, the TUSB320 device detects and communicates the advertised current level of the DFP to the system through the OUT1 and OUT2 GPIOs. SKEVM power requirement is 5 V @ 3 A. If the source is not capable of providing 5 V at 3 A, output at the NOR gate becomes low which disables VUSB_Main power switch. Hence all power supplies except VCC3V3_TA remain in the off state. The board gets powered ON completely only when the source is capable of providing 5 V at 3 A.

GUID-20230501-SS0I-NV92-P57K-LQZVSC3QVFCV-low.png Figure 4-8 USB Type-C Interface for Power Input
Table 4-2 Current Sourcing Capability and State of USB Type C Cable
OUT1 OUT2 Advertisement
H H Default current in unattached state
H L Default current in attached state
L H Medium current (1.5A) in attached state
L L High current (3.0A) in attached state