SBAU411 February   2023 ADS127L21

 

  1.   Abstract
  2.   Trademarks
  3. 1EVM Overview
    1. 1.1 ADS127L21 EVM Kit
    2. 1.2 ADS127L21EVM Board
    3. 1.3 ADS127L21EVM-PDK-GUI Unsupported Features
    4. 1.4 Related Documentation
  4. 2Analog Interface
    1. 2.1 EVM Analog Input Options
    2. 2.2 ADC Connections and Decoupling
    3. 2.3 ADC Input Drive Amplifiers
    4. 2.4 VCOM Buffer
    5. 2.5 Onboard Voltage Reference
    6. 2.6 External Voltage Reference
    7. 2.7 Clock Tree
  5. 3Digital Interface
    1. 3.1 Serial Interface
    2. 3.2 I2C bus for Onboard EEPROM
  6. 4Power Supplies
    1. 4.1 Power Connection and Configuration
    2. 4.2 Low Dropout Regulator (LDO)
  7. 5ADS127L21 EVM Software Installation
  8. 6EVM Operation
    1. 6.1 Connecting the Hardware
    2. 6.2 Optional EVM Connections
    3. 6.3 EVM GUI Global Settings for ADC Control
    4. 6.4 Time Domain Display
    5. 6.5 Frequency Domain Display
    6. 6.6 Histogram Display
    7. 6.7 Digital Filter Configuration
    8. 6.8 Digital Filter Response
  9. 7Bill of Materials, Schematics, and Layout
    1. 7.1 Bill of Materials
    2. 7.2 Schematics
    3. 7.3 Board Layout

6.1 Connecting the Hardware

Connect the EVM as shown in #GUID-9440A4D4-15B4-4766-BD95-981E1B67E18E after installing the software:

  1. Physically connect P2 of the PHI to J1 of the ADS127L21 EVM.
  2. Install the screws to provide a robust connection. Connect the USB on the PHI to the computer first.
    1. LED D5 on the PHI lights up, indicating that the PHI is powered up.
    2. LEDs D1 and D2 on the PHI start blinking to indicate that the PHI is booted up and communicating with the PC; #GUID-9440A4D4-15B4-4766-BD95-981E1B67E18E shows the resulting LED indicators.
  3. Start the software GUI as shown in #GUID-130EC6C5-878A-4224-B0F9-2706AFA1E309. Notice that the LEDs blink slowly when the FPGA firmware is loaded on the PHI. This loading takes a few seconds, then the AVDD and DVDD power supplies turn on.
  4. Connect the signal generator. The input range is 0 V to 5 V. A common input signal applied is a 4.9-VPP signal with a 2.5-V offset. This signal is adjusted just below the full-scale range to avoid clipping.
Figure 6-1 Connecting the Hardware to the ADS127L21EVM
Figure 6-2 Launch the EVM GUI Software