SBAU411 February   2023 ADS127L21

 

  1.   Abstract
  2.   Trademarks
  3. 1EVM Overview
    1. 1.1 ADS127L21 EVM Kit
    2. 1.2 ADS127L21EVM Board
    3. 1.3 ADS127L21EVM-PDK-GUI Unsupported Features
    4. 1.4 Related Documentation
  4. 2Analog Interface
    1. 2.1 EVM Analog Input Options
    2. 2.2 ADC Connections and Decoupling
    3. 2.3 ADC Input Drive Amplifiers
    4. 2.4 VCOM Buffer
    5. 2.5 Onboard Voltage Reference
    6. 2.6 External Voltage Reference
    7. 2.7 Clock Tree
  5. 3Digital Interface
    1. 3.1 Serial Interface
    2. 3.2 I2C bus for Onboard EEPROM
  6. 4Power Supplies
    1. 4.1 Power Connection and Configuration
    2. 4.2 Low Dropout Regulator (LDO)
  7. 5ADS127L21 EVM Software Installation
  8. 6EVM Operation
    1. 6.1 Connecting the Hardware
    2. 6.2 Optional EVM Connections
    3. 6.3 EVM GUI Global Settings for ADC Control
    4. 6.4 Time Domain Display
    5. 6.5 Frequency Domain Display
    6. 6.6 Histogram Display
    7. 6.7 Digital Filter Configuration
    8. 6.8 Digital Filter Response
  9. 7Bill of Materials, Schematics, and Layout
    1. 7.1 Bill of Materials
    2. 7.2 Schematics
    3. 7.3 Board Layout

2.3 ADC Input Drive Amplifiers

The circuit shown in #GUID-A170C781-AC0C-4066-BF8B-19425EDEF816 is the fully differential amplifier (THS4561) that drives the ADC. The input applied to J3 and J6 must be a low-distortion differential signal. The common-mode output for the amplifier is controlled by pin 7 on U5 (VOCM). The common-mode signal is set by the data converter (pin 3, VCM). The output of the amplifier connects to an RC filter that connects to the ADC input (R37, R43, C30, C26, and C32). The amplified configuration has several do not populate (DNP) components. These components provide flexibility, but are not required for good performance. The amplifier power supplies are connected by default to the AVDD and AVSS supplies that are also used for the ADC. The amplifier supplies can be changed to external supplies VP and VM by removing the 0-Ω resistors that connect to AVDD1 and AVSS (R31 and R47), and installing these resistors to connect VP and VM (R32 and R48).

Figure 2-2 ADC Drive Amplifier