SBAU417A July   2025  – September 2025 AFE7952

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Recommended Test Environment
    2. 2.2 Required Hardware
    3. 2.3 Hardware Setup
      1. 2.3.1 AFE7952 EVM and TSW14J58 EVM Connections
      2. 2.3.2 Power Supply Setup
  7. 3Software
    1. 3.1 Required Software
      1. 3.1.1 Software Installation Sequence
    2. 3.2 Latte Overview
      1. 3.2.1 Latte User Interface
      2. 3.2.2 Useful Latte Short-Cuts
  8. 4Implementation Results
    1. 4.1 AFE7952EVM Configuration
      1. 4.1.1 Connect Latte to Board
      2. 4.1.2 Compile Libraries
      3. 4.1.3 Program AFE7952 EVM
      4. 4.1.4 TXDAC Evaluation
      5. 4.1.5 RXADC and FBADC Evaluation
    2. 4.2 AFE7952EVM Configuration Modifications
      1. 4.2.1 Data Converter Clocks Settings
      2. 4.2.2 Data Rate and JESD Parameters
      3. 4.2.3 Steps to Modify NCO
  9. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  10. 6Additional Information
    1. 6.1 Status Check and Troubleshooting Guidelines
      1. 6.1.1 AFE7952 EVM Status Indicators
      2. 6.1.2 TSW14J58 EVM
    2. 6.2 Trademarks
  11. 7Revision History

2.3.1 AFE7952 EVM and TSW14J58 EVM Connections

  1. Connect the FMC connector U31 of AFE7952 EVM to FMC connector J3 of TSW14J58 EVM.
  2. With the power supply in powered down mode, connect a 5.5V, 5A maximum power supply to J2 +5V IN connector of the TSW14J58EVM.
  3. Connect USB 3.0 cable from the PC to J1 connector of the TSW14J58 EVM.
  4. Connect USB Mini-B cable from the PC to FTDI_USB connector of the TSW14J58 EVM.
  5. With the power supply in powered down mode, connect the 5.5V, 5A maximum power supply to J18 connector of the AFE7952 EVM.
  6. Connect USB Mini-B cable from the PC to J19 connector of the AFE7952 EVM.
  7. Optionally: Connect 10MHz of lab equipment reference to J14, LMK_CLK_IN connector.

  8. Optionally: Choose the FPGA bitfile version by changing J35 jumper position.

    1. Default: For bitfile version 204B, check that the physical position of jumper J35 is covering pins 2 and 3 (the two pins positioned furthest from the FPGA fan).
    2. For bitfile version 204C, check that the physical position of jumper J35 is covering pins 1 and 2 (the two pins positioned nearest to the FPGA fan).
    3. The configuration steps in this guide assume the ser is using bitfile version 204B.
Refer to Figure 1-2 for typical connection between the TSW14J58 EVM and the AFE7952 EVM. It is recommended to connect the USBs directly to the PC, rather than a USB hub, and disconnect unnecessary USB devices from the PC. Other USB devices can potentially interfere with the PC's ability to recognize the EVM USB handles.

After completing these steps, turn on the power supplies.