SBAU417A July 2025 – September 2025 AFE7952
This parameter is used to configure the data converter clocks and clock distribution path.
#Configures the reference input frequency to the on-chip PLL of the AFE7952.
sysParams.FRef = 491.52
#Configures the RXADC converter sample rate.
sysParams.FadcRx = 2949.12
#Configures the FBADC converter sample rate.
sysParams.FadcF = 2949.12
#Configures the TXDAC converter sample rate.
sysParams.Fdac = 2949.12*4
#Sets the clock source for the RXADC converters. The source is now from the on-chip PLL.
sysParams.externalClockRx = False
#Sets the clock source for the TXDAC converters. The source is now from the on-chip PLL.
sysParams.externalClockTx = False