SCAU061 August   2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 CDCLVP111-SEP Clock Mux Selection
    2. 2.2 CDCLVP111-SEP EVM Input Biasing
    3. 2.3 CDCLVP111-SEP EVM Output Termination
    4. 2.4 Assembly Instructions
      1. 2.4.1 CDCLVP111-SEP Setup and Quick Test
        1. 2.4.1.1 Power Supply Setup
  8. 3Hardware Design Files
    1. 3.1 CDCLVP111-SEP EVM Schematic
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)

Power Supply Setup

Figure 2-3 illustrates the necessary power connections for 3.3V VCC-to-VEE operation.

  • With supply 1 disabled, program supply 1V to 3.3V with 500mA current limit
  • With supply 2 disabled, program supply 2V to 2V with 500mA current limit
CDCLVP111SEPEVM Power
                    Supply Connections Figure 2-3 Power Supply Connections
  1. Connect supplies and board with banana cables as shown. This configuration is for nominal 3.3V testing. To configure other VCC-to-VEE voltages, program supply 1 to the proper range of 2.375V to 3.8V. Supply 2 remains fixed with 2V offset from VCC to earth ground termination.
  2. With the signal generator disabled, program according to Table 2-2 based on the supply voltage used. Note, that the amplitudes and offsets are based on a single-ended signal.
    Table 2-2 Power Supply Configuration
    VoltageVCC:VEEVCC-GNDCLK[0:1] amplitudeCLK[0:1] offset
    MIN2.375V2V500mV0.625V
    TYP3.3V2V500mV–0.3 V
    MAX3.8V2V500mV–0.8 V
  3. This configuration provides a 1V peak-to-peak differential clock with appropriate offset relative to earth ground (LVPECL termination point).
  4. Connect 1 or more output pairs to a 50Ω terminated oscilloscope.
  5. Connect signal generator to CLK0 and nCLK0.
  6. Verify that JP3 is open or set between pins 2 and 3. This enables CLK0. Jumper pins 1 and 2 are shorted to select CLK1.
    1. There is an error with the silkscreen, JP3 'H' side is a resistor to VEE or GND.
  7. Enable power supply 1 and 2.
  8. Enable signal generator outputs.
  9. View outputs on oscilloscope screen.