SCAU061 August   2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 CDCLVP111-SEP Clock Mux Selection
    2. 2.2 CDCLVP111-SEP EVM Input Biasing
    3. 2.3 CDCLVP111-SEP EVM Output Termination
    4. 2.4 Assembly Instructions
      1. 2.4.1 CDCLVP111-SEP Setup and Quick Test
        1. 2.4.1.1 Power Supply Setup
  8. 3Hardware Design Files
    1. 3.1 CDCLVP111-SEP EVM Schematic
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)

2.1 CDCLVP111-SEP Clock Mux Selection

The EVM provides a three-pin jumper, J1, to select CLK0 or CLK1 pairs.

Table 2-1 CDCLVP111-SEP Jumper Configuration
Reference Designator# of PinsDefault ConfigPin 1 SilkscreenPin 2 SilkscreenPin 3 Silkscreen
J13Short pins 1-2VEECLK_SELVCC

The CDCLVP111-SEP CLK_SEL pin contains a 75kΩ pulldown to VEE. Leaving J1 without jumper selects the CLK0 pair, the same as if J1 has pins 1 and 2 shorted. Shorting J1 pins 2 and 3 selects CLK1 input pair.