SCDS436A September   2023  – December 2024 TMUX9616 , TMUX9616N

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Electrical Characteristics: TMUX9616
    6. 5.6 Switching Characteristics: TMUX9616
    7. 5.7 Digital Timings: TMUX9616
    8. 5.8 Timing Diagrams
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Off-Leakage Current
    2. 6.2 Device Turn On/Off Time
    3. 6.3 Off Isolation
    4. 6.4 Inter-Channel Crosstalk
    5. 6.5 Output Voltage Spike
    6. 6.6 Switch DC Offset Voltage
    7. 6.7 Isolation Diode Current
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Wide Input Signal Range (up to ±110 V, 220 VPP)
      2. 7.3.2 Bidirectional Operation
      3. 7.3.3 Device Digital Logic Control
      4. 7.3.4 Latch-Up Immunity by Device Construction
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Mode
      2. 7.4.2 Device Power Up
    5. 7.5 Device Logic Table
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5.6 Switching Characteristics: TMUX9616

VDD = +110 V, VSS = –110 V, VLL = 1.7V - 5.5V, GND = 0 V (unless otherwise noted) 
Typical at VDD = +110 V, VSS = –110 V, VLL = 3.3V, TA = 25℃  (unless otherwise noted)
PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT
tON Turn-on time from enable VS = 100 V
RL = 10 kΩ
 25°C 1.5 µs
–40°C to +85°C 3 µs
tOFF Turn-off time from enable VS = 100 V
RL = 10 kΩ
 25°C 0.8 µs
–40°C to +85°C 2.5 µs
dV/dtMAX Maximum Analog Signal Slew Rate –40°C to +85°C 20 V/ns
OISO_TX Off-isolation TX RL = 50 Ω 
VS = 0 VBIAS, 10 VPP, f = 5 MHz
Refer to Off Isolation		 25°C –70 dB
OISO_TX Off-isolation TX RL = 1 kΩ , CL = 15 pF
VS = 0 VBIAS, 10 VPP, f = 5 MHz
Refer to Off Isolation		 25°C –54 dB
OISO_RX Off-isolation RX RL = 50 Ω 
VD = 0 VBIAS, 10 VPP, f = 5 MHz
Refer to Off Isolation		 25°C –70 dB
OISO_RX Off-isolation RX RL = 1 kΩ , CL = 15 pF
VD = 0 VBIAS, 10 VPP, f = 5 MHz
Refer to Off Isolation		 25°C –54 dB
XTALK_TX Crosstalk TX RL = 50 Ω
VS = 0 VBIAS, 10 VPP, f = 5 MHz
 25°C –75 dB
XTALK_RX Crosstalk RX RL = 50 Ω
VD = 0 VBIAS, 10 VPP, f = 5 MHz
 25°C –75 dB
BWSS_TX –3dB Bandwidth (Small Signal) TX RL = 50 Ω 
VS = 0 V, Vpp = 200mV
 25°C 500 MHz
BWSS_RX –3dB Bandwidth (Small Signal) RX RL = 50 Ω 
VD = 0 V, Vpp = 200mV
 25°C 500 MHz
HD2PC_LL_TX Second Harmonic Distortion Pulse Cancellation (Large Signal) TX VPP = 200 V, VS = 0 V

RL  =  100 Ω || 100pF
f = 5 MHz, 2 Cycles, dv/dt: 7.1V/ns		 25°C 54 dBc
CS(OFF) Source off capacitance VS = 0 VBIAS, 100 mVPP, f = 1 MHz 25°C 5 pF
CD(OFF) Drain off capacitance VD = 0 VBIAS, 100 mVPP, f = 1 MHz 25°C 5 pF
CS(ON), CD(ON) On capacitance VS/VD = 0 VBIAS, 100 mVPP, f = 1 MHz 25°C 10 pF
VSPK Output voltage spike RL_Source = 1kΩ, RL_Drain = 50Ω
Enable and Disable Switch
 25°C -45 18 mV
VSPK Output voltage spike RL_Source = 1kΩ, RL_Drain = 50Ω
Enable and Disable Switch
 –40°C to +85°C -55 25 mV