SCDS486 April   2025 TMUX6612-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Absolute Maximum Ratings
  7. ESD Ratings
  8. Thermal Information
  9. Source or Drain Current through Switch
  10. Recommended Operating Conditions
  11. 10Electrical Characteristics (Global)
  12. 11Electrical Characteristics (±15V Dual Supply)
  13. 12Switching Characteristics (±15V Dual Supply)
  14. 13Electrical Characteristics (12V Single Supply)
  15. 14Switching Characteristics (12V Single Supply)
  16. 15Typical Characteristics
  17. 16Parameter Measurement Information
    1. 16.1  On-Resistance
    2. 16.2  Off-Leakage Current
    3. 16.3  On-Leakage Current
    4. 16.4  tON and tOFF Time
    5. 16.5  tON (VDD) Time
    6. 16.6  Propagation Delay
    7. 16.7  Charge Injection
    8. 16.8  Off Isolation
    9. 16.9  Channel-to-Channel Crosstalk
    10. 16.10 Bandwidth
    11. 16.11 THD + Noise
    12. 16.12 Power Supply Rejection Ratio (PSRR)
  18. 17Detailed Description
    1. 17.1 Overview
    2. 17.2 Functional Block Diagram
    3. 17.3 Feature Description
      1. 17.3.1 Bidirectional Operation
      2. 17.3.2 Rail-to-Rail Operation
      3. 17.3.3 1.8V Logic Compatible Inputs
      4. 17.3.4 Flat On-Resistance
      5. 17.3.5 Power-Up Sequence Free
    4. 17.4 Device Functional Modes
      1. 17.4.1 Truth Tables
  19. 18Application and Implementation
    1. 18.1 Application Information
    2. 18.2 Design Requirements
    3. 18.3 Detailed Design Procedure
    4. 18.4 Application Curve
    5. 18.5 Thermal Considerations
    6. 18.6 Power Supply Recommendations
    7. 18.7 Layout
      1. 18.7.1 Layout Guidelines
      2. 18.7.2 Layout Example
  20. 19Device and Documentation Support
    1. 19.1 Documentation Support
      1. 19.1.1 Related Documentation
    2. 19.2 Receiving Notification of Documentation Updates
    3. 19.3 Support Resources
    4. 19.4 Trademarks
    5. 19.5 Electrostatic Discharge Caution
    6. 19.6 Glossary
  21. 20Revision History
  22. 21Mechanical, Packaging, and Orderable Information

Charge Injection

The TMUX6612-Q1 devices have a transmission-gate topology. Any mismatch in capacitance between the NMOS and PMOS transistors results in a charge injected into the drain or source during the falling or rising edge of the gate signal. The amount of charge injected into the source or drain of the device is known as charge injection, and is denoted by the symbol QC. Figure 16-7 shows the setup used to measure charge injection from source (Sx) to drain (Dx).

TMUX6612-Q1 Charge-Injection Measurement
                                        SetupFigure 16-7 Charge-Injection Measurement Setup