SLUSF65B October   2023  – August 2026 BQ25185

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
      1. 6.1.1 Battery Charging Process
        1. 6.1.1.1 Trickle Charge
        2. 6.1.1.2 Precharge
        3. 6.1.1.3 Fast Charge
        4. 6.1.1.4 ISET Pin Detection
        5. 6.1.1.5 Termination
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Input Voltage Based Dynamic Power Management (VINDPM)
      2. 6.3.2  Dynamic Power Path Management Mode (DPPM)
      3. 6.3.3  Battery Supplement Mode
      4. 6.3.4  Sleep Mode
      5. 6.3.5  SYS Regulation
      6. 6.3.6  ILIM/VSET Control
      7. 6.3.7  Protection Mechanisms
        1. 6.3.7.1 Input Overvoltage Protection
        2. 6.3.7.2 Battery Undervoltage Lockout
        3. 6.3.7.3 Battery Overcurrent Protection
        4. 6.3.7.4 System Overvoltage Protection
        5. 6.3.7.5 System Short Protection
        6. 6.3.7.6 Thermal Protection and Thermal Regulation
        7. 6.3.7.7 Safety Timer
      8. 6.3.8  Pushbutton Long Press Function
      9. 6.3.9  External NTC Monitoring (TS)
        1. 6.3.9.1 TS Biasing and Function
      10. 6.3.10 Status Pins
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input Current and Battery Regulation Voltage - ILIM/VSET
        2. 7.2.2.2 Fast Charge Current- ISET
        3. 7.2.2.3 Recommended Passive Components
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Layout Guidelines

  • To obtain optimal performance, the decoupling capacitor from IN to GND, the capacitor from SYS to GND, and the capacitor from BAT to GND must be placed as close as possible to the device.
  • A solid ground plane tied to the GND pin and thermal pad must be used.
  • The pushbutton GND must be connected as close to the device as possible.
  • The high-current charge paths into IN, SYS, and BAT must be sized appropriately for the maximum charge current to avoid voltage drops in these traces.