SLUSFM0 May   2025 TPS4816-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Charge Pump and Gate Driver output (VS, GATE, BST, SRC)
      2. 8.3.2 Capacitive Load Driving
        1. 8.3.2.1 Using Bypass FET (G drive) for Load Capacitor Charging
        2. 8.3.2.2 Using Main FET's (GATE drive) Gate Slew Rate Control
      3. 8.3.3 Overcurrent and Short-Circuit Protection
        1. 8.3.3.1 I2t Based Overcurrent Protection
          1. 8.3.3.1.1 I2t based Overcurrent Protection with Auto-Retry
          2. 8.3.3.1.2 I2t based Overcurrent Protection with Latch-Off
        2. 8.3.3.2 Short-Circuit Protection
      4. 8.3.4 Analog Current Monitor Output (IMON)
      5. 8.3.5 NTC based Temperature Sensing (TMP) and Analog Monitor Output (ITMPO)
      6. 8.3.6 Fault Indication and Diagnosis (FLT)
      7. 8.3.7 Reverse Polarity Protection
      8. 8.3.8 Undervoltage (UVLO) and Overvoltage (OV) Protection
      9. 8.3.9 TPS48161-Q1 as a Simple Gate Driver
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power Down
      2. 8.4.2 Shutdown Mode
      3. 8.4.3 Active Mode (AM)
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application: Driving Capacitve Load
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

8.3.5 NTC based Temperature Sensing (TMP) and Analog Monitor Output (ITMPO)

TPS4816-Q1 features an integrated temperature monitoring amplifier (ON in active mode only). This temperature monitoring function is implemented with a differential amplifier with input pin as TMP and output pin as ITMPO.

The analog output voltage, VITMPO represents the temperature sensed by RNTCwhich can be directly read on pin ITMPO (Temperature monitoring output) by microcontroller.

VITMPO can be calculated based on following equation:

Equation 9. VITMPO = VREF_TMP + VTMP_OFFSET × RITMPORNTC + RTMP

where,

VREF_TMP is 500mV (typical)

VTMP_OFFSET is ±5mV

RTMP is 330Ω for 10k NTC at 25°C

RTMP is 1kΩ for 47k NTC at 25°C

TPS4816-Q1 has integrated comparator on ITMPO pin to detect external main FET overtemperature fault. When voltage on ITMPO exceeds above V(TMP_OT) (2V typ) threshold then main FET (GATE) turns off, device goes into latch-off and FLT asserts low. Latch is reset on falling edge of INP or LPM going low or EN/UVLO (below V(ENF)) or power cycle VS below V(VS_PORF).

External FET overtemperature threshold can be programmed based on following equation:

Equation 10. V(TMP_OT) = VREF_TMP + VTMP_OFFSET × RITMPO+ RINTRNTC + RTMP

Where,

RITMPO is resistor in ohm on ITMPO pin.

V(TMP_OT) is fixed external FET overtemperature threshold of 2V (typical).

RINT is internal resistor with 200Ω (typical) and 90/340Ω min/max value.

RNTC is the NTC thermistor resistance which varies with the temperature and RTMP is a normal resistor used to linearize the thermistor behavior with respect to temperature, positioned as per Figure 8-9:

TPS4816-Q1 NTC based Temperature sensing and monitoring outputFigure 8-9 NTC based Temperature sensing and monitoring output