SLUUD68 December   2024

 

  1.   1
  2.   Abstract
  3. 13
  4. 1General TI High Voltage Evaluation User Safety Guidelines
  5. 2Module Compatibility
    1. 2.1 Supported Wolfspeed Modules and Evaluation Platforms
  6. 3System Overview and Functions
    1. 3.1 Features
    2. 3.2 Specifications
    3. 3.3 PCB Pinout
    4. 3.4 Device Information
      1. 3.4.1 Primary-Side Power
      2. 3.4.2 Primary-Side I/O and Diagnostics
      3. 3.4.3 Secondary-Side Bias Supply
      4. 3.4.4 Output Stage Gate Loop
      5. 3.4.5 Short-Circuit Detection - DESAT
  7. 4Using the EVM
    1. 4.1 Equipment List
    2. 4.2 Test Setups and Procedures
      1. 4.2.1 Power-On and Bias Supply Check
      2. 4.2.2 Output Switching
  8. 5EVM Example Measurements
    1. 5.1 DESAT Functionality Testing
  9. 6EVM Tuning
    1. 6.1 Adjust Power Supplies
      1. 6.1.1 Adjust Only VDD Bias Supply
      2. 6.1.2 Adjust VDD and VEE Bias Supplies Simultaneously
      3. 6.1.3 Switch to Unipolar Bias Supply
      4. 6.1.4 Bypass VDD LDO
    2. 6.2 Adjust Drive Strength
    3. 6.3 Adjust Soft Turn-off Strength
  10. 7Hardware Design Files
    1. 7.1 Schematics
    2. 7.2 PCB Layouts
    3. 7.3 Bill of Materials (BOM)
  11. 8Additional Information
    1. 8.1 Trademarks
  12. 9Revision History

3.4.2 Primary-Side I/O and Diagnostics

The primary-side I/O and diagnostic block fulfills the following functions:

  • Provides signal input, including high-side and low-side PWM and RESET, as well as +12-V voltage input to the half-bridge board.
    • If the power and signal inputs are given via the differential board connector, the status output pin of a power MUX, TPS2121, is used to turn on the SN65C1167 dual differential driver and receiver. The dual differential driver and receiver then converts the differential gate driver inputs to single-ended gate driver inputs, and converts single-ended gate driver outputs to differential outputs that will be transmitted to the differential board.
    • If the power and signal inputs are given via the test point hooks on this EVM, the power MUX turns off the SN65C1167 dual differential driver and receiver. This protects the dual differential driver and receiver from damage.
  • Filters out the high frequency noise in the high-side and low-side differential signals through RLC filters.
  • Combines high-side and low-side RDY and nFLT signal into one FLT_OUT signal through an SN74LV21 AND gate.
  • Combines the nRST signal coming from the differential board and the on-board reset button into one RESET signal through an SN74LV21 AND gate.

    The +12-V power supply and the PWM signals should be connected to the same board, either the differential board or the EVM. Failure to do so might result in EVM component damage.

UCC2189X5YQEVM-096 Primary Side nFLT/RDY/Reset LogicFigure 3-2 Primary Side nFLT/RDY/Reset Logic

UCC2189X5YQEVM-096 Primary Side Input Filtering and MUXFigure 3-3 Primary Side Input Filtering and MUX
UCC2189X5YQEVM-096 Primary Side Connectors and TransceiverFigure 3-4 Primary Side Connectors and Transceiver