SLUUD68 December   2024

 

  1.   1
  2.   Abstract
  3. 13
  4. 1General TI High Voltage Evaluation User Safety Guidelines
  5. 2Module Compatibility
    1. 2.1 Supported Wolfspeed Modules and Evaluation Platforms
  6. 3System Overview and Functions
    1. 3.1 Features
    2. 3.2 Specifications
    3. 3.3 PCB Pinout
    4. 3.4 Device Information
      1. 3.4.1 Primary-Side Power
      2. 3.4.2 Primary-Side I/O and Diagnostics
      3. 3.4.3 Secondary-Side Bias Supply
      4. 3.4.4 Output Stage Gate Loop
      5. 3.4.5 Short-Circuit Detection - DESAT
  7. 4Using the EVM
    1. 4.1 Equipment List
    2. 4.2 Test Setups and Procedures
      1. 4.2.1 Power-On and Bias Supply Check
      2. 4.2.2 Output Switching
  8. 5EVM Example Measurements
    1. 5.1 DESAT Functionality Testing
  9. 6EVM Tuning
    1. 6.1 Adjust Power Supplies
      1. 6.1.1 Adjust Only VDD Bias Supply
      2. 6.1.2 Adjust VDD and VEE Bias Supplies Simultaneously
      3. 6.1.3 Switch to Unipolar Bias Supply
      4. 6.1.4 Bypass VDD LDO
    2. 6.2 Adjust Drive Strength
    3. 6.3 Adjust Soft Turn-off Strength
  10. 7Hardware Design Files
    1. 7.1 Schematics
    2. 7.2 PCB Layouts
    3. 7.3 Bill of Materials (BOM)
  11. 8Additional Information
    1. 8.1 Trademarks
  12. 9Revision History

3.4.4 Output Stage Gate Loop

The gate driver output block consists of a pair of PMOS/NMOS buffer stage, the turn-on gate resistor, the turn-off gate resistor, and the connectors to the SiC MOSFET/IGBT module. Test points are also placed near the output pins for easy measurement of the gate voltage.

UCC2189X5YQEVM-096 Output Stage Gate Loop Figure 3-6 Output Stage Gate Loop