SLUUD68 December   2024

 

  1.   1
  2.   Abstract
  3. 13
  4. 1General TI High Voltage Evaluation User Safety Guidelines
  5. 2Module Compatibility
    1. 2.1 Supported Wolfspeed Modules and Evaluation Platforms
  6. 3System Overview and Functions
    1. 3.1 Features
    2. 3.2 Specifications
    3. 3.3 PCB Pinout
    4. 3.4 Device Information
      1. 3.4.1 Primary-Side Power
      2. 3.4.2 Primary-Side I/O and Diagnostics
      3. 3.4.3 Secondary-Side Bias Supply
      4. 3.4.4 Output Stage Gate Loop
      5. 3.4.5 Short-Circuit Detection - DESAT
  7. 4Using the EVM
    1. 4.1 Equipment List
    2. 4.2 Test Setups and Procedures
      1. 4.2.1 Power-On and Bias Supply Check
      2. 4.2.2 Output Switching
  8. 5EVM Example Measurements
    1. 5.1 DESAT Functionality Testing
  9. 6EVM Tuning
    1. 6.1 Adjust Power Supplies
      1. 6.1.1 Adjust Only VDD Bias Supply
      2. 6.1.2 Adjust VDD and VEE Bias Supplies Simultaneously
      3. 6.1.3 Switch to Unipolar Bias Supply
      4. 6.1.4 Bypass VDD LDO
    2. 6.2 Adjust Drive Strength
    3. 6.3 Adjust Soft Turn-off Strength
  10. 7Hardware Design Files
    1. 7.1 Schematics
    2. 7.2 PCB Layouts
    3. 7.3 Bill of Materials (BOM)
  11. 8Additional Information
    1. 8.1 Trademarks
  12. 9Revision History

3.4.5 Short-Circuit Detection - DESAT

The short-circuit detection system on the board provides protection in case of a short-circuit event. When a short circuit is detected, the gate driver sinks a specified amount of current through the SSD pin, which is programmable by the SSD pin external resistor. The FLT flag will also be raised on the primary side. If the short-circuit detection system is not used or if an IGBT/MOSFET is not connected to the board, J1 and J2 should be shorted to high-side and low-side COM respectively to prevent false short-circuit triggering.

The Vds voltage detection threshold can be calculated with the equation below mentioned in this FAQ:

Equation 1. VDET⁡= VDESAT-VZ-n× VF-Ichg× Rlim

With the 9V internal DESAT detection threshold, the two STTH122A diode with forward voltage of 0.6 V each, the 1kΩ limiting resistor, the Zener diode with 2.7-V Zener voltage, and the 2mA internal charging current, the Vds DESAT detection threshold is calculated to be 3.1V. If another Vds voltage detection threshold is desired, adjust the size of the current-limiting resistor and the Zener voltage of the Zener diode.

In this EVM, method mentioned in this FAQ is implemented to increase the DESAT charging current in case of a short-circuiting event. Increasing the DESAT charging current can decrease the blanking time of the capacitor and provide better protection for SiC MOSFETs. The blanking time for this circuit can be calculated by the equation mentioned in the same FAQ, which is calculated to be 115 ns. This blanking time calculation is valid for VDD = 20V; if another VDD value is used, the blanking time will vary.

UCC2189X5YQEVM-096 DESAT Circuit Figure 3-7 DESAT Circuit