The output capacitor is designed based on output ripple and loop response. The output voltage ripple is composed of two parts. One is caused by the inductor current ripple going through the ESR of the output capacitor, see Equation 19. The other is caused by the inductor current ripple charging and discharging the output capacitor, see Equation 20. The target output ripple is 30 mV, so ΔV_{O_ESR} < 30 mV and ΔV_{O_C} < 30 mV, then R_ESR < 125 mΩ and C_O > 0.91 μF.

Equation 19.

Equation 20.

From Equation 13, the maximum ESR value is calculated to get a reasonable crossover frequency and enough phase margin. If you assume the target crossing over frequency f_c is about 20 kHz, then the result is R_ESR ≪ 612 mΩ. Three times margin is suggested and the result is R_ESR < 204 mΩ.

Output capacitor value determines loop response in internally compensated PCM buck converters, as Equation 15 and Equation 16. With TPS560430 internal parameter, the calculation equation is as Equation 21 and Equation 22. The target f_c is about 20 kHz, so C_O is about 15 μF. Consider of derating, one 22-μF, 16-V ceramic capacitor with 4-mΩ ESR is used. The capacitance after derating is 13 μF: C_O = 13 μF, R_ESR = 4 mΩ. The crossover frequency is f_c = 23.4 kHz and the phase margin is calculated as 64.2° at V_IN = 12 V, I_O = 0.6 A. The equation also indicates that the worst phase margin happens at minimum V_IN and minimum I_O, while the calculation result is 59.2° at V_IN = 7 V, I_O = 0.1 A. They meet design specs.

Equation 21.

Equation 22.