SLVAE09B July   2018  – August 2021 TPS560430

 

  1.   Trademarks
  2. 1Introduction
  3. 2Peak Current Mode Loop Modeling
    1. 2.1 Overall Control Block Diagram and Transfer Function Derivation
    2. 2.2 Inside Current Loop Model
    3. 2.3 Overall Loop Model
    4. 2.4 Inductor and Output Capacitor Design Limits
    5. 2.5 The Equation to Calculate Bandwidth and Phase Margin
  4. 3Inductor and Output Capacitor Design
    1. 3.1 Inductor Design
    2. 3.2 Output Capacitor Design
    3. 3.3 Simulation and Bench Verification
  5. 4Summary
  6. 5References
  7. 6Revision History

5 References

  1. Texas Instruments, TPS560430 4-V to 36-V, 600-mA Synchronous Step-Down Converter Data Sheet
  2. R.B. Ridley, A New Small-Signal Model for Current-Mode Control, PhD Dissertation, Virginia Polytechnic Institute and State University, November, 1990.
  3. Texas Instruments, TPS65270 Loop Compensation Design Consideration Application Report
  4. Texas Instruments, How to Evaluate the Maximum Inductor in an Internal Compensation PCM Buck Converter Application Report