SLVSI23A September   2025  – December 2025 DRV81646

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specification
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7.     13
    8. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Control Interface and Slew Rate (RSLEW/CNTL)
      2. 6.3.2 Current Sensing With FET Source Terminals
      3. 6.3.3 Integrated Clamp Diode, VCLAMP
      4. 6.3.4 Protection Circuits
        1. 6.3.4.1 ILIM Analog Current Limit
          1. 6.3.4.1.1 Effect of Load Resistance on Power Dissipation Before TSD
        2. 6.3.4.2 Cut-Off Delay (COD)
        3. 6.3.4.3 INRUSH Mode
        4. 6.3.4.4 Thermal Shutdown (TSD)
        5. 6.3.4.5 Undervoltage Lockout (UVLO)
      5. 6.3.5 Fault Conditions Summary
    4. 6.4 Device Functional Modes
      1. 6.4.1 Hardware Interface Operation
      2. 6.4.2 Parallel Outputs
      3. 6.4.3 SPI Mode
        1. 6.4.3.1 Parity Bit Calculation
        2. 6.4.3.2 SPI Input Packet
        3. 6.4.3.3 SPI Response Packet
        4. 6.4.3.4 SPI Error Reporting
        5. 6.4.3.5 SPI Daisy Chain
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 External Components
      2. 7.2.2 Continuous Current Capability
      3. 7.2.3 Power Dissipation
      4. 7.2.4 Application Curves
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Bulk Capacitance
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.5 Electrical Characteristics

4.5V ≤ VVM ≤ 65V, –40°C ≤ TJ ≤ 150°C (unless otherwise noted), Typical values at 24V, 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLY
IVM VM operating supply current VM = 24V, No Switching 3 mA
VM = 24V, Output switching at 200kHz 5 mA
VUVLO VM undervoltage lockout voltage VM rising 4.1 4.25 4.45 V
VM falling 4.0 4.15 4.35 V
VUVLO_HYS VM undervoltage lockout hysteresis 100 mV
tUVLO VM undervoltage deglitch 10 µs
LOGIC-LEVEL INPUTS (INx, nSCS, SCLK, SDI)
VIL Input low voltage 0.8 V
VIH Input high voltage 2 V
VHYS Input hysteresis 0.4 V
IIL Input low current VIN = 0 –5 5 μA
IIH Input high current VIN = 3.3V 50 100 μA
OPEN-DRAIN OUTPUT (nFAULT, SDO)
VOL Output low voltage for nFAULT, SDO IO = 5mA 0.1 V
IOH Output high leakage current for nFAULT, SDO Pull-up resistor to 5V 1 μA
tnFAULT_VALID Time after VVM > VUVLO (rising) that nFAULT signal is valid. 30 μs
SEVEN-LEVEL INPUT (RSLEW/CNTL)
VLVL1 Level 1 of 7 Tied to GND 0 0.1 V
VLVL2 Level 2 of 7 14.7kΩ ±5% to GND 0.2 0.35 V
VLVL3 Level 3 of 7 44.2kΩ ± 5% to GND 0.55 0.8 V
VLVL4 Level 4 of 7 100kΩ ± 5% to GND 1 1.25 V
VLVL5 Level 5 of 7 249kΩ ± 5% to GND 1.5 1.75 V
VLVL6 Level 6 of 7 Hi-Z 2.1 2.4 V
VLVL7 Level 7 of 7 Tied to DVDD (logic voltage) 3 5 V
IRSLEW/CNTL Input current 22.5 µA
SWITCHING
tR Rise time
OUTx rising from 10% to 90%
VM = 24V, RL = 48Ω, CL = 0.1nF		 VLVL1 on RSLEW/CNTL 100 150 ns
VLVL6 or VLVL7 on RSLEW/CNTL 300 450 ns
VLVL4 or VLVL5 on RSLEW/CNTL 700 1000 ns
VLVL2 or VLVL3 on RSLEW/CNTL 1500 2300 ns
tF Fall time
OUTx falling from 90% to 10%
VM = 24V, RL = 48Ω, CL = 0.1nF		 VLVL1 on RSLEW/CNTL 100 150 ns
VLVL6 or VLVL7 on RSLEW/CNTL 300 450 ns
VLVL4 or VLVL5 on RSLEW/CNTL 700 1000 ns
VLVL2 or VLVL3 on RSLEW/CNTL 1500 2300 ns
tPD Input to output propagation delay
INx rising above VIH to OUTx falling to 90%, or INx falling below VIL to OUTx rising to 10%
VM = 24V; RL = 48Ω CL = 0.1nF		 VLVL1 on RSLEW/CNTL 100 150 ns
VLVL6 or VLVL7 on RSLEW/CNTL 250 370 ns
VLVL4 or VLVL5 on RSLEW/CNTL 400 600 ns
VLVL2 or VLVL3 on RSLEW/CNTL 700 1000 ns
DRIVER OUTPUTS (OUTx)
RDS(ON) FET on resistance VM = 24V, IO = 500mA, TJ = 25°C 140 mΩ
VM = 24V, IO = 500mA, TJ = 85°C 225 mΩ
IOFF Off-state leakage current VOUT = VM = 24V 0.5 μA
IOFF Off-state leakage current VOUT = VM = 65V 10 μA
VF Recirculation Diodes forward voltage VOUT = 24V, IO = 500mA 1.2 V
IOFF Recirculation Diodes reverse leakage current VOUT = 0V, VCLAMP = 65V 10 μA
PROTECTION CIRCUITS
ILIM Current limitation value
Follows 60/RILIM[kΩ] for 30kΩ ≤ RILIM ≤ 120kΩ		 RILIM short to GND or RILIM < 20kΩ 3 A
RILIM = 30kΩ 1.4 2 2.6 A
RILIM = 60kΩ 0.7 1 1.3 A
RILIM = 90kΩ 0.4 0.66 0.9 A
RILIM = 120kΩ 0.3 0.5 0.7 A
ILIM_ACTIVATE Current limit activation threshold
Follows ILIM+50%		 RILIM = Short to GND 4.7 A
RILIM = 30kΩ 3 A
RILIM = 60kΩ 1.5 A
RILIM = 90kΩ 1 A
RILIM = 120kΩ 0.75 A
IINRUSH Current limitation value during tINRUSH
Follows 2*ILIM[kΩ] for RILIM≥40kΩ		 RILIM = Short to GND 4 A
RILIM = 30kΩ 4 A
RILIM = 60kΩ 1.4 2 2.6 A
RILIM = 90kΩ 0.8 1.2 1.6 A
RILIM = 120kΩ 0.6 1 1.4 A
IINRUSH_ACTIVATE  Current limit activation threshold during INRUSH
Follows IINRUSH+50%		 RILIM = Short to GND 6.5 A
RILIM = 30kΩ 6 A
RILIM = 60kΩ 3 A
RILIM = 90kΩ 2 A
RILIM = 120kΩ 1.5 A
RHiZ Inrush mode selection.   Pull down resistor on COD/Inrush pin.  Value of external resistor above which Inrush Mode is selected.   1 MΩ
tCOD_DIS Cut off Delay disable threshold Value of external resistor below which Cut off function is disabled 20 kΩ
tCOD Cut off Delay
Adjust with external resistor RCOD to GND
Follows RCOD[kΩ]/120 ±15% for 60kΩ ≤ RCOD ≤ 240kΩ		 RCOD = 60kΩ 0.4 0.5 0.6 ms
RCOD = 120kΩ 0.8 1 1.2 ms
RCOD = 180kΩ  1.2 1.5 1.8 ms
RCOD = 240kΩ 1.6 2 2.4 ms
tINRUSH Inrush Mode duration COD/INRUSH pin unconnected 10 ms
tRETRY Overcurrent protection retry time
Adjust with external resistor RCOD to GND
Follows 32*tCOD ±15% for 60kΩ ≤ RCOD ≤ 240kΩ		 RCOD = 60kΩ 15.5 ms
RCOD = 120kΩ 31 ms
RCOD = 180kΩ 46.5 ms
RCOD = 240kΩ 62 ms
TTSD Thermal shutdown temperature Die temperature 150 170 190 °C
TTSD_HYS Thermal shutdown temperature hysteresis 40 °C
tTSD_DG Thermal shutdown deglitch 20 µs