SLVSI23A September   2025  – December 2025 DRV81646

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specification
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7.     13
    8. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Control Interface and Slew Rate (RSLEW/CNTL)
      2. 6.3.2 Current Sensing With FET Source Terminals
      3. 6.3.3 Integrated Clamp Diode, VCLAMP
      4. 6.3.4 Protection Circuits
        1. 6.3.4.1 ILIM Analog Current Limit
          1. 6.3.4.1.1 Effect of Load Resistance on Power Dissipation Before TSD
        2. 6.3.4.2 Cut-Off Delay (COD)
        3. 6.3.4.3 INRUSH Mode
        4. 6.3.4.4 Thermal Shutdown (TSD)
        5. 6.3.4.5 Undervoltage Lockout (UVLO)
      5. 6.3.5 Fault Conditions Summary
    4. 6.4 Device Functional Modes
      1. 6.4.1 Hardware Interface Operation
      2. 6.4.2 Parallel Outputs
      3. 6.4.3 SPI Mode
        1. 6.4.3.1 Parity Bit Calculation
        2. 6.4.3.2 SPI Input Packet
        3. 6.4.3.3 SPI Response Packet
        4. 6.4.3.4 SPI Error Reporting
        5. 6.4.3.5 SPI Daisy Chain
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 External Components
      2. 7.2.2 Continuous Current Capability
      3. 7.2.3 Power Dissipation
      4. 7.2.4 Application Curves
    3. 7.3 Power Supply Recommendations
      1. 7.3.1 Bulk Capacitance
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

7.2.1 External Components

Table 7-1 lists the recommended external components for the DRV81646, and Table 7-2 lists additional components that can be used to improve performance or add electrical isolation.

Table 7-1 Required External Components
SYMBOL DESCRIPTION VALUE PURPOSE
CVM Capacitor on VM 1uF Supply voltage filtering
CBULK Bulk capacitor on VM 47uF – 100uF Supply voltage inrush and ripple smoothing
RCOD_INRUSH Pull-down resistor on COD_INRUSH pin Set resistance based on desired cut-off delay and INRUSH mode
RSLEW_CNTL Pull-down resistor on RSLEW/CNTL pin Set a pulldown resistor based on slew rate setting and control interface desired
RILIM Pull-down resistor on ILIM pin Set resistance based on current limit desired
RSDO Pull-up resistor to logic voltage on open drain IN4/SDO pin if in SPI mode 10kΩ Make the SDO voltage rises to logic high when the pin is not pulled low
RnFAULT Pull-up resistor to logic voltage on open-drain nFAULT pin 10kΩ Bias the nFAULT voltage to high when the pin is not pulled low
Table 7-2 Optional External Components
SYMBOL DESCRIPTION VALUE PURPOSE
COUT Capacitor on each OUTx to GND 10nF Filtering for system level ESD
TVSSURGE Surge diode on VCLAMP pin SMAJ33CA or TVS3300 Protection against system level voltage surge and for inductive demagnetization
RSNS Current sense resistor on SRC pins to GND < 200mΩ Optional Resistor at SRC pin for sensing of load current
UISOLATION Quad-channel digital isolator for INx or SPI signals

INx control: ISO6440

SPI: ISO6441

 Provide electrical isolation between rest of the circuit and the DRV81646