SLVSL52 September 2026 XTR100
ADVMIX
The XTR1xx is interfaced to 4mA – 20mA loop as in Figure 7-1 which shows a simplified schematic omitting compensation. A power stage like wide VIN LDO is required to power XTR1xx from the loop voltage VLOOP. With INN input connected to ground, op amp positive input is kept at virtual ground and the user can derive the relation for ILOOP:
Given the target maximum loop current ILOOP,max and the target maximum DAC output VINP, the right R2 is calculated then approximated to the nearest available standard resistor. With the actual R2, the actual maximum DAC output is determined.
Table 7-1 lists the proper standard R2 resistor for certain DAC REF and target maximum ILOOP.
| TARGET MAXIMUM OUTPUT CURRENT | |||||||
|---|---|---|---|---|---|---|---|
| 25mA | 24mA | 21mA | |||||
| Reference | target FS | R2 | R2std | R2 | R2std | R2 | R2std |
| 1.25V | 1.24 | 12.40 | 12.4 | 12.92 | 12.9 | 14.76 | 14.7 |
| 2.5V | 2.4 | 24.00 | 24 | 25.00 | 24.9 | 28.57 | 28.7 |
| 3V | 2.8 | 28.00 | 28 | 29.17 | 29.1 | 33.33 | 33.2 |
| 3.3V | 3 | 30.00 | 30 | 31.25 | 31.2 | 35.71 | 35.7 |