SLVSL52 September   2026 XTR100

ADVMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 ESD Protection
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Zero-Drift Clocking
      2. 7.1.2 Basic Functionality in Loop-Powered Transmitters
      3. 7.1.3 Current Consumption
      4. 7.1.4 System Error Estimation
    2. 7.2 Typical Applications
      1. 7.2.1 XTR100 4mA – 20mA Transmitter
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
      2. 7.2.2 XTR100 4mA – 20mA Low Voltage Transmitter
      3. 7.2.3 XTR100 Precision Divider and Adder
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
        2. 8.1.1.2 TINA-TI™ Simulation Software (Free Download)
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Basic Functionality in Loop-Powered Transmitters

The XTR1xx is interfaced to 4mA – 20mA loop as in Figure 7-1 which shows a simplified schematic omitting compensation. A power stage like wide VIN LDO is required to power XTR1xx from the loop voltage VLOOP. With INN input connected to ground, op amp positive input is kept at virtual ground and the user can derive the relation for ILOOP:

Equation 1. I1=1RIN×VINP
Equation 2. VL-=-R1RIN×VINP
Equation 3. I2=-1R2×VL-
Equation 4. ILOOP=I1+I2
Equation 5. ILoop=1+R1R2×VINPRIN
Equation 6. ILoop=R2+R1RIN×VINPR2
Equation 7. ILoop≈R1RIN×VINPR2≈RatioNOM×VINPR2, for R1≫R2

Given the target maximum loop current ILOOP,max and the target maximum DAC output VINP, the right R2 is calculated then approximated to the nearest available standard resistor. With the actual R2, the actual maximum DAC output is determined.

XTR100 Simplified Circuit for XTR100 in Loop-Powered Transmitter Figure 7-1 Simplified Circuit for XTR100 in Loop-Powered Transmitter

Table 7-1 lists the proper standard R2 resistor for certain DAC REF and target maximum ILOOP.

Table 7-1 R2 Values for Different DAC Full-Scale and Different Target Maximum ILOOP
TARGET MAXIMUM OUTPUT CURRENT
25mA 24mA 21mA
Reference target FS R2 R2std R2 R2std R2 R2std
1.25V 1.24 12.40 12.4 12.92 12.9 14.76 14.7
2.5V 2.4 24.00 24 25.00 24.9 28.57 28.7
3V 2.8 28.00 28 29.17 29.1 33.33 33.2
3.3V 3 30.00 30 31.25 31.2 35.71 35.7