SLVT251 July   2026

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 High-Voltage Stackable Architecture
      2. 2.2.2 Electrochemical Impedance Spectroscopy (EIS) Subsystem
      3. 2.2.3 EIS Synchronization Requirement
      4. 2.2.4 PWM Input as Crystal of the First BQ79826Z-Q1
      5. 2.2.5 Temperature Sensing and Multiplexer Network
      6. 2.2.6 Cell Balancing Circuit and Operation
      7. 2.2.7 MCU and System Control Architecture
      8. 2.2.8 Protection and On-Board Diagnostics
    3. 2.3 Highlighted Products
      1. 2.3.1 BQ79826Z-Q1
      2. 2.3.2 TMUX1308
      3. 2.3.3 TMP61
      4. 2.3.4 SN74LXC1T14
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Software
    3. 3.3 Test Setup
    4. 3.4 Pack Test Results
      1. 3.4.1 Cell Voltage Reliability Test
      2. 3.4.2 EIS Measurement Repeatability
      3. 3.4.3 Pack EIS Measurement Nyquist Plot
      4. 3.4.4 Current Consumption per BQ79826Z-Q1
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
      3. 4.1.3 PCB Layout Recommendations
    2. 4.2 Tools and Software
      1. 4.2.1 Tools
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5.     Trademarks
  11. 5About the Author

Hardware Requirements

Board connectors are divided into cell sampling, temperature, daisy-chain. Each pin is defined with cell differential sampling, thermistor access, differential communication and fault signal functions, following uniform specification for convenient assembly and debugging.

Table 3-1 Battery Connector J4

CONNECTOR AND PIN

ASSIGNMENTS

FUNCTION OR SCHEMATIC NET NOTES
J4-1 TS1 Temperature Sense 1
J4-2 TS3 Temperature Sense 3
J4-3 TS5 Temperature Sense 5
J4-4 TS7 Temperature Sense 7
J4-5 GND System Ground
J4-6 NC No Connection
J4-7 NC No Connection
J4-8 NC No Connection
J4-9 NC No Connection
J4-10 CELL0 Cell 0 Voltage Sense
J4-11 CELL2 Cell 2 Voltage Sense
J4-12 CELL4 Cell 4 Voltage Sense
J4-13 CELL6 Cell 6 Voltage Sense
J4-14 CELL8 Cell 8 Voltage Sense
J4-15 CELL10 Cell 10 Voltage Sense
J4-16 CELL12 Cell 12 Voltage Sense
J4-17 NC No Connection
J4-18 NC No Connection
J4-19 NC No Connection
J4-20 NC No Connection
J4-21 GND System Ground
J4-22 TS2 Temperature Sense 2
J4-23 TS4 Temperature Sense 4
J4-24 TS6 Temperature Sense 6
J4-25 TS8 Temperature Sense 8
J4-26 NC No Connection
J4-27 NC No Connection
J4-28 NC No Connection
J4-29 NC No Connection
J4-30 GND System Ground
J4-31 CELL1 Cell 1 Voltage Sense
J4-32 CELL3 Cell 3 Voltage Sense
J4-33 CELL5 Cell 5 Voltage Sense
J4-34 CELL7 Cell 7 Voltage Sense
J4-35 CELL9 Cell 9 Voltage Sense
J4-36 CELL11 Cell 11 Voltage Sense
J4-37 CELL13 Cell 13 Voltage Sense
J4-38 NC No Connection
J4-39 NC No Connection
J4-40 NC No Connection
J4-MNT1 Mounting Pin 1 Mechanical/Shielding Ground
J4-MNT2 Mounting Pin 2 Mechanical/Shielding Ground
Table 3-2 Battery Connector J5

CONNECTOR AND PIN

ASSIGNMENTS

FUNCTION OR SCHEMATIC NET NOTES
J5-1 TS8 Temperature Sense 8
J5-2 TS10 Temperature Sense 10
J5-3 TS12 Temperature Sense 12
J5-4 TS14 Temperature Sense 14
J5-5 GND System Ground
J5-6 NC No Connection
J5-7 NC No Connection
J5-8 NC No Connection
J5-9 NC No Connection
J5-10 CELL14 Cell 14 Voltage Sense
J5-11 CELL16 Cell 16 Voltage Sense
J5-12 CELL18 Cell 18 Voltage Sense
J5-13 CELL20 Cell 20 Voltage Sense
J5-14 CELL22 Cell 22 Voltage Sense
J5-15 CELL24 Cell 24 Voltage Sense
J5-16 CELL26 Cell 26 Voltage Sense
J5-17 PWR Power Rail
J5-18 NC No Connection
J5-19 NC No Connection
J5-20 NC No Connection
J5-21 GND System Ground
J5-22 TS9 Temperature Sense 9
J5-23 TS11 Temperature Sense 11
J5-24 TS13 Temperature Sense 13
J5-25 TS15 Temperature Sense 15
J5-26 NC No Connection
J5-27 NC No Connection
J5-28 NC No Connection
J5-29 NC No Connection
J5-30 NC No Connection
J5-31 CELL15 Cell 15 Voltage Sense
J5-32 CELL17 Cell 17 Voltage Sense
J5-33 CELL19 Cell 19 Voltage Sense
J5-34 CELL21 Cell 21 Voltage Sense
J5-35 CELL23 Cell 23 Voltage Sense
J5-36 CELL25 Cell 25 Voltage Sense
J5-37 NC No Connection
J5-38 NC No Connection
J5-39 NC No Connection
J5-40 NC No Connection
J5-MNT1 Mounting Pin 1 Mechanical/Shielding Ground
J5-MNT2 Mounting Pin 2 Mechanical/Shielding Ground
Table 3-3 Communication Connector J1

CONNECTOR AND PIN

ASSIGNMENTS

FUNCTION OR SCHEMATIC NET NOTES
J1-1 BMU_COMML_P Daisy-Chain Positive Input
J1-2 BMU_COMML_N Daisy-Chain Negative Input
J1-3 (GND / Reference) Transformer Return Path
J1-4 (NC) No Connection
Table 3-4 Communication Connector J2

CONNECTOR AND PIN

ASSIGNMENTS

FUNCTION OR SCHEMATIC NET NOTES
J2-1 BMU_COMMH_N Daisy-Chain Negative Output
J2-2 BMU_COMMH_P Daisy-Chain Positive Output
J2-3 (GND / Reference) Transformer Return Path
J2-4 (NC) No Connection
Table 3-5 Logic Level Connector J6

CONNECTOR AND PIN

ASSIGNMENTS

FUNCTION OR SCHEMATIC NET NOTES
J6-1 AVDD Analog 3.3V Power Rail
J6-2 VIO Digital 3.3V Power Rail
J6-3 GND System Ground
Table 3-6 MCU Connector J7

CONNECTOR AND PIN

ASSIGNMENTS

FUNCTION OR SCHEMATIC NET NOTES
J7-1 MCU2AFE_PWM PWM Control Signal to AFE
J7-2 MCU_SCLK SPI Clock
J7-3 MCU_MOSI SPI Master Out / Slave In
J7-4 MCU_MISO SPI Master In / Slave Out
J7-5 MCU_NCS SPI Chip Select
J7-6 VIO 3.3V Power Rail
J7-7 GPIO3 / NFAULT Fault Indication Signal
J7-8 GND System Ground
J7-9 AFE2MCU_PWM Feedback PWM from AFE
J7-10 GND System Ground
Table 3-7 GPIO Debug Connector J8

CONNECTOR AND PIN

ASSIGNMENTS

FUNCTION OR SCHEMATIC NET NOTES
J8-1 GPIO19 General-Purpose I/O 19
J8-2 GPIO20 General-Purpose I/O 20
J8-3 GPIO17 General-Purpose I/O 17
J8-4 GPIO18 General-Purpose I/O 18
J8-5 GPIO15 General-Purpose I/O 15
J8-6 GPIO16 General-Purpose I/O 16
J8-7 GPIO13 General-Purpose I/O 13
J8-8 GPIO14 General-Purpose I/O 14
J8-9 GPIO11 General-Purpose I/O 11
J8-10 GPIO12 General-Purpose I/O 12
J8-11 GPIO9 General-Purpose I/O 9
J8-12 GPIO10 General-Purpose I/O 10
J8-13 GPIO7 General-Purpose I/O 7
J8-14 GPIO8 General-Purpose I/O 8
J8-15 GPIO5 General-Purpose I/O 5
J8-16 GPIO6 General-Purpose I/O 6
J8-17 GPIO3 General-Purpose I/O 3
J8-18 GPIO4 General-Purpose I/O 4
J8-19 GPIO1 General-Purpose I/O 1
J8-20 GPIO2 General-Purpose I/O 2
Table 3-8 Daisy Chain Connector J9

CONNECTOR AND PIN

ASSIGNMENTS

FUNCTION OR SCHEMATIC NET NOTES
J9-1 GND System Ground
J9-2 COMMH_N Daisy-Chain Negative
J9-3 COMMH_P Daisy-Chain Positive
Table 3-9 Daisy Chain Connector J10

CONNECTOR AND PIN

ASSIGNMENTS

FUNCTION OR SCHEMATIC NET NOTES
J10-1 GND System Ground
J10-2 COMML_N Daisy-Chain Negative
J10-3 COMML_P Daisy-Chain Positive
Table 3-10 External SPI Connector J12

CONNECTOR AND PIN

ASSIGNMENTS

FUNCTION OR SCHEMATIC NET NOTES
J12-1 VIO 3.3V Power Rail
J12-2 MSPI_SCLK SPI Clock (AFE)
J12-3 MSPI_MOSI SPI Master Out / Slave In (AFE)
J12-4 MSPI_MISO SPI Master In / Slave Out (AFE)
J12-5 MSPI_NCS SPI Chip Select (AFE)
J12-6 GND System Ground