SLVUD43 February   2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Modification
    2. 2.2 Connector, Test Point, and Jumper Descriptions
      1. 2.2.1 Connector and Test Point Descriptions
      2. 2.2.2 Jumper Configuration
        1. 2.2.2.1 JP2 (ENABLE)
        2. 2.2.2.2 JP5 and JP1 (External Feedback and Internal Feedback Selection)
    3. 2.3 Test Procedure
  9. 3Software
    1. 3.1 Software User Interface
      1. 3.1.1 Install USB2ANY Explorer
      2. 3.1.2 GUI Installation
      3. 3.1.3 Interface Hardware Setup
      4. 3.1.4 User Interface Operation
      5. 3.1.5 Register Map Screen
  10. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials
  11. 5Additional Information
    1.     Trademarks

2.2.2.2 JP5 and JP1 (External Feedback and Internal Feedback Selection)

The JP5 jumper is for the external feedback or the internal feedback selection. By default, this jumper is set to the FB_INT position. Place this jumper in the FB_EXT position for the external output voltage feedback.

The JP1 jumper is for the external feedback connection. Place a jumper across JP1 when using external feedback. Leave JP1 open when using internal feedback.

When using external output voltage feedback, the output voltage is determined by Equation 1:

Equation 1. VOUT=VREF x (1+RFB_UPRFB_BT)

TI recommends to use 100 kΩ for the up resistor, RFB_UP. The reference voltage, VREF, at the FB/INT pin is programmable from 45 mV to 1.2 V by writing a 11-bit data into registers 00H and 01H.