SLVUDB9 July   2025 ADC34RF72

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware and Software Setup
    1. 2.1  Board Overview
    2. 2.2  Required Equipment
    3. 2.3  Required Software Installation
    4. 2.4  Required TI Software to Install
    5. 2.5  3rd Party Software to Install
    6. 2.6  Software Environment Setup
    7. 2.7  Hardware Setup and Connections
    8. 2.8  ADC3xRF72 EVM Connections
    9. 2.9  TSW14J58 Data Capture Card Connections
    10. 2.10 Debug LEDs
    11. 2.11 EVM Jumpers and Switches
  9. 3ADC3xRF72 EVM Configuration and Programming
    1. 3.1  ADC EVM Quick Start
    2. 3.2  Power on all Boards and Signal Generators
    3. 3.3  Launch GSPS FPGA Server
    4. 3.4  Launch High-Speed Data Converter Professional (HSDC Pro) SW
    5. 3.5  Programming the ADC
    6. 3.6  Quick Start Mode
    7. 3.7  System Level Configuration Mode
    8. 3.8  Advanced Mode
    9. 3.9  Runtime Configuration
    10. 3.10 Exporting ADC3xRF72 Configuration and Python API usage
    11. 3.11 Further GUI Help
  10. 4Troubleshooting and FAQ
  11. 5Important Signal Routing
    1. 5.1 ADC Device Clock Routing
    2. 5.2 Board Modifications
      1. 5.2.1 ADC3xRF72 Analog Inputs
  12. 6Hardware Design Files
    1. 6.1 Schematics
    2. 6.2 PCB Layouts
    3. 6.3 Bill of Materials (BOM)
  13. 7Additional Information
    1. 7.1 Trademarks
  14. 8References

3.5 Programming the ADC

For programming, the ADC3xRF72 comes with a GUI that allows the user to configure the EVM into their desired mode of operation. The GUI can be found at the product page for the EVM on ti.com. Launch the GUI.

Note: The ADC3xRF72 EVM GUI does not support a simulation mode and must have a physical EVM connected to function correctly. If it is launched without an EVM connected, the following error message appears (as shown in Figure 3-3). This message also appears if the usb handle for the EVM does not match what is expected for the EVM. For more details and information regarding debugging this issue,see Section 4.
ADC34RF72 Sim Mode Not Supported Figure 3-3 Sim Mode Not Supported

If the ADC EVM successfully connects to the GUI, it looks like Figure 3-4. The GUI comes preset to a default configuration of Sampling frequency = 1.5GHz and all internal digital signal processing bypassed. If the hardware is configured as mentioned in Section 5, then the user can simply click "program ADC" and the GUI programs the ADC, the FPGA and tries to initialize the FPGA link so that data can start to be captured. Progress can be monitored in the below message console. If the ADC successfully programs the message, “ADC programming Success!” prints out in the console. Now the GUI starts to program the FPGA, debug messages can be seen in the message console as well but progress can also be monitored in the FPGA tab of the GUI. If the FPGA is successfully programmed and the link is successfully initialized then the following status shows in the FPGA tab. If not, then refer to Section 4 for further support.

ADC34RF72 EVM GUI Program ADC Figure 3-4 EVM GUI Program ADC
ADC34RF72 ADC GUI FPGA Figure 3-5 ADC GUI FPGA

If the status matches what is shown in the figure, then the data can be captured and plotted in HSDC Pro. To do this press the “Capture Data” button in the ADC GUI. The resulting data can be seen in HSDC Pro as shown in Figure 3-6.

ADC34RF72 Example FFT Output Spectrum Figure 3-6 Example FFT Output Spectrum