SNVSBO7B July 2020 – May 2025 LM63610-Q1
PRODUCTION DATA
The output voltage of the LM63610-Q1 is set by the condition of the VSEL input. This example requires a 5V output, so the VSEL input is connected to VCC and the FB input is connected directly to the output capacitor.
For cases where the desired output voltage is other than 5V or 3.3V, an external feedback divider is required. As shown in Figure 8-2, the divider network is comprised of RFBT and RFBB, and closes the loop between the output voltage and the converter. In this case, a 10kΩ resistor is connected from the VSEL input go ground. The converter regulates the output voltage by holding the voltage on the FB pin equal to the internal reference voltage, 1V. The resistance of the divider is a compromise between excessive noise pickup and excessive loading of the output. Smaller values of resistance reduce noise sensitivity, but also reduce the light-load efficiency. The recommended value for RFBT is 100kΩ with a maximum value of 1MΩ. If 1MΩ is selected for RFBT, then a feedforward capacitor must be used across this resistor to provide adequate loop phase margin (see CFF Selection). After RFBT is selected, Equation 4 is used to select RFBB. VREF is nominally 1V.
Figure 8-2 Feedback Divider for Adjustable Output Voltage Setting