SNVSCN8A September   2025  – October 2025 TPS923610 , TPS923611

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable and Start-up
      2. 7.3.2 Under-Voltage Lockout (UVLO)
      3. 7.3.3 Shutdown
      4. 7.3.4 Boost Control Operation
      5. 7.3.5 Switching Peak Current Limit
      6. 7.3.6 Over-Voltage Protection
      7. 7.3.7 Output Current Setting
      8. 7.3.8 Output Current PWM Controlled Analog Dimming
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation Mode
      2. 7.4.2 Over-Voltage Protection Mode
      3. 7.4.3 Shutdown Mode
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 LED Current Set Resistor
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Thermal Considerations
    3. 8.3 Power Supply Recommendations
    4. 8.4 Application Curves
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

ESD Ratings

VALUE UNIT
V(ESD)(1) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(2) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(3) ±500
Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges into the device.
Level listed above is the passing level per ANSI, ESDA, and JEDEC JS-001. JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500V HBM is possible with the necessary precautions.
Level listed above is the passing level per EIA-JEDEC JESD22-C101. JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 250V CDM is possible with the necessary precautions.