The Abs2Qep implementation uses the following C2000 resources:
- C28x CPU
- Initializes the Abs2Qep
interface, configures the CLB, input/output XBARS and GPIOs.
- Translates the change in
absolute position into the equivalent QEP-A/QEP-B and QEP-I pulses.
- Configures the CLB to
generate the pulse train output.
- Configurable Logic Block (CLB)
type 1 or later
- Generates the PTO-QEP-A/B and
QEP-I pulses as defined by the C28x.
- Indicates the pulse train is
complete by setting a CLB interrupt tag.
- Device interconnect (XBARs)
- Input and output XBARs are used to route signals to and from the CLB as
applicable.