SPRACC0A November   2017  – November 2020 TMS320F28075 , TMS320F28075-Q1 , TMS320F28076 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379D-Q1

 

  1.   Trademarks
  2. Introduction and Scope
  3. SRAM Bit Array
  4. Sources of SRAM Failures
    1. 3.1 Manufacturing Defects
      1. 3.1.1 Time Zero Fails
      2. 3.1.2 Latent Fails
    2. 3.2 Circuit Drift With Usage
    3. 3.3 Circuit Overstress
    4. 3.4 Soft Errors
      1. 3.4.1 Radioactive Events
      2. 3.4.2 Dynamic Voltage Events
      3. 3.4.3 Summary of Error Sources
  5. Methods for Managing Memory Failures in Electronic Systems
    1. 4.1 Start-Up Testing
    2. 4.2 In-System Testing
    3. 4.3 Parity Detection
    4. 4.4 Error Detection and Correction (EDAC)
    5. 4.5 Redundancy
  6. Comparisons and Conclusions
  7. C2000 Memory Types Example
    1. 6.1 TMS320F2837xD
  8. Memory Types
    1. 7.1 Dedicated RAM (Mx and Dx RAM)
    2. 7.2 Local Shared RAM (LSx RAM)
    3. 7.3 Global Shared RAM (GSx RAM)
    4. 7.4 CPU Message RAM (CPU MSGRAM)
    5. 7.5 CLA Message RAM (CLA MSGRAM)
  9. Summary
  10. References
  11. 10Revision History

Soft Errors

In the context of this discussion soft errors refer to SRAM fails that are caused by an event external to the SRAM array and do not damage the SRAM circuitry. They are temporary in that once a new value is written to the affected word the error no longer exists. Two sources of this type failure are radioactive particles penetrating the circuit and dynamic voltage noise at the time of a read or write of a word.

Soft errors become more common as the semiconductor geometries reduce. This is both because the bits are closer together (creating a more target rich environment) and because the voltage levels are lower so that the bit cell storage is less robust.

Soft errors only affect the system if the system reads the disturbed word before this word gets written. Some SRAM contents are static in nature, for example code or tables. Other SRAM contents are dynamic, such as incoming data and variables. Also many algorithms operating on data are resilient to single bit errors especially if the errors are in the lower significant bits. So the fail rate due to soft errors is much lower in dynamic data than in static usage of SRAM. In many systems, the code and tables are stored in non-volatile memory like ROM or FLASH and the SRAM is primarily used for dynamic storage.