SPRSP93C November   2024  – December 2025 F29H850TU , F29H859TU-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
    1. 3.1 Functional Block Diagram
  5. 4 Device Comparison
    1. 4.1 Related Products
  6. 5 Pin Configuration and Functions
    1. 5.1 Pin Diagrams
    2. 5.2 Pin Attributes
    3. 5.3 Signal Descriptions
      1. 5.3.1 Analog Signals
      2. 5.3.2 Digital Signals
      3. 5.3.3 Test, JTAG, and Reset
    4. 5.4 Pins With Internal Pullup and Pulldown
    5. 5.5 Pin Multiplexing
      1. 5.5.1 GPIO Muxed Pins
    6. 5.6 Connections for Unused Pins
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  F29H85x ESD Ratings – Commercial
    3. 6.3  F29H85x ESD Ratings – Automotive
    4. 6.4  F29P58x ESD Ratings – Commercial
    5. 6.5  F29P58x ESD Ratings – Automotive
    6. 6.6  F29P32x ESD Ratings – Automotive
    7. 6.7  Recommended Operating Conditions
    8. 6.8  Power Consumption Summary
      1. 6.8.1 System Current Consumption VREG Disable - External Supply
      2. 6.8.2 System Current Consumption VREG Enabled
      3. 6.8.3 Operating Mode Test Description
      4. 6.8.4 Reducing Current Consumption
        1. 6.8.4.1 Typical Current Reduction per Disabled Peripheral
    9. 6.9  Electrical Characteristics
    10. 6.10 Special Considerations for 5V Fail-Safe Pins
    11. 6.11 Thermal Resistance Characteristics for ZEX Package
    12. 6.12 Thermal Resistance Characteristics for PTS Package
    13. 6.13 Thermal Resistance Characteristics for RFS Package
    14. 6.14 Thermal Resistance Characteristics for PZS Package
    15. 6.15 Thermal Design Considerations
    16. 6.16 System
      1. 6.16.1  Power Management Module (PMM)
        1. 6.16.1.1 Introduction
        2. 6.16.1.2 Overview
          1. 6.16.1.2.1 Power Rail Monitors
            1. 6.16.1.2.1.1 I/O POR (Power-On Reset) Monitor
            2. 6.16.1.2.1.2 I/O BOR (Brown-Out Reset) Monitor
            3. 6.16.1.2.1.3 VDD POR (Power-On Reset) Monitor
          2. 6.16.1.2.2 External Supervisor Usage
          3. 6.16.1.2.3 Delay Blocks
          4. 6.16.1.2.4 Internal VDD LDO Voltage Regulator (VREG)
          5. 6.16.1.2.5 VREGENZ
        3. 6.16.1.3 External Components
          1. 6.16.1.3.1 Decoupling Capacitors
            1. 6.16.1.3.1.1 VDDIO Decoupling
            2. 6.16.1.3.1.2 VDD Decoupling
        4. 6.16.1.4 Power Sequencing
          1. 6.16.1.4.1 Supply Pins Ganging
          2. 6.16.1.4.2 Signal Pins Power Sequence
          3. 6.16.1.4.3 Supply Pins Power Sequence
            1. 6.16.1.4.3.1 External VREG/VDD Mode Sequence
            2. 6.16.1.4.3.2 Internal VREG/VDD Mode Sequence
            3. 6.16.1.4.3.3 Supply Sequencing Summary and Effects of Violations
            4. 6.16.1.4.3.4 Supply Slew Rate
        5. 6.16.1.5 Power Management Module Electrical Data and Timing
          1. 6.16.1.5.1 Power Management Module Operating Conditions
          2. 6.16.1.5.2 Power Management Module Characteristics
      2. 6.16.2  Reset Timing
        1. 6.16.2.1 Reset Sources
        2. 6.16.2.2 Reset Electrical Data and Timing
          1. 6.16.2.2.1 Reset XRSn Timing Requirements
          2. 6.16.2.2.2 Reset XRSn Switching Characteristics
          3. 6.16.2.2.3 Reset Timing Diagrams
      3. 6.16.3  Clock Specifications
        1. 6.16.3.1 Clock Sources
        2. 6.16.3.2 Clock Frequencies, Requirements, and Characteristics
          1. 6.16.3.2.1 Input Clock Frequency and Timing Requirements, PLL Lock Times
            1. 6.16.3.2.1.1 Input Clock Frequency
            2. 6.16.3.2.1.2 XTAL Oscillator Characteristics
            3. 6.16.3.2.1.3 X1 Input Level Characteristics When Using an External Clock Source Not a Crystal
            4. 6.16.3.2.1.4 X1 Timing Requirements
            5. 6.16.3.2.1.5 AUXCLKIN Timing Requirements
            6. 6.16.3.2.1.6 APLL Characteristics
            7. 6.16.3.2.1.7 XCLKOUT Switching Characteristics PLL Bypassed or Enabled
            8. 6.16.3.2.1.8 Internal Clock Frequencies
        3. 6.16.3.3 Input Clocks
        4. 6.16.3.4 XTAL Oscillator
          1. 6.16.3.4.1 Introduction
          2. 6.16.3.4.2 Overview
            1. 6.16.3.4.2.1 Electrical Oscillator
              1. 6.16.3.4.2.1.1 Modes of Operation
                1. 6.16.3.4.2.1.1.1 Crystal Mode of Operation
                2. 6.16.3.4.2.1.1.2 Single-Ended Mode of Operation
              2. 6.16.3.4.2.1.2 XTAL Output on XCLKOUT
            2. 6.16.3.4.2.2 Quartz Crystal
            3. 6.16.3.4.2.3 GPIO Modes of Operation
          3. 6.16.3.4.3 Functional Operation
            1. 6.16.3.4.3.1 ESR – Effective Series Resistance
            2. 6.16.3.4.3.2 Rneg – Negative Resistance
            3. 6.16.3.4.3.3 Start-up Time
            4. 6.16.3.4.3.4 DL – Drive Level
          4. 6.16.3.4.4 How to Choose a Crystal
          5. 6.16.3.4.5 Testing
          6. 6.16.3.4.6 Common Problems and Debug Tips
          7. 6.16.3.4.7 Crystal Oscillator Specifications
            1. 6.16.3.4.7.1 Crystal Equivalent Series Resistance (ESR) Requirements
            2. 6.16.3.4.7.2 Crystal Oscillator Parameters
            3. 6.16.3.4.7.3 Crystal Oscillator Electrical Characteristics
        5. 6.16.3.5 Internal Oscillators
          1. 6.16.3.5.1 INTOSC Characteristics
      4. 6.16.4  Flash Parameters
        1. 6.16.4.1 C29 Flash Parameters 
        2. 6.16.4.2 HSM Flash Parameters 
      5. 6.16.5  Memory Subsystem (MEMSS)
        1. 6.16.5.1 Introduction
        2. 6.16.5.2 Features
        3. 6.16.5.3 RAM Specifications
      6. 6.16.6  Debug/JTAG
        1. 6.16.6.1 JTAG Electrical Data and Timing
          1. 6.16.6.1.1 DEBUGSS Timing Requirements
          2. 6.16.6.1.2 DEBUGSS Switching Characteristics
          3. 6.16.6.1.3 JTAG Timing Diagram
          4. 6.16.6.1.4 SWD Timing Diagram
      7. 6.16.7  GPIO Electrical Data and Timing
        1. 6.16.7.1 GPIO – Output Timing
          1. 6.16.7.1.1 General-Purpose Output Switching Characteristics
          2. 6.16.7.1.2 General-Purpose Output Timing Diagram
        2. 6.16.7.2 GPIO – Input Timing
          1. 6.16.7.2.1 General-Purpose Input Timing Requirements
          2. 6.16.7.2.2 Sampling Mode
        3. 6.16.7.3 Sampling Window Width for Input Signals
      8. 6.16.8  Real-Time Direct Memory Access (RTDMA)
        1. 6.16.8.1 Introduction
          1. 6.16.8.1.1 Features
          2. 6.16.8.1.2 Block Diagram
      9. 6.16.9  Low-Power Modes
        1. 6.16.9.1 Clock-Gating Low-Power Modes
        2. 6.16.9.2 Low-Power Mode Wake-up Timing
          1. 6.16.9.2.1 IDLE Mode Timing Requirements
          2. 6.16.9.2.2 IDLE Mode Switching Characteristics
          3. 6.16.9.2.3 IDLE Entry and Exit Timing Diagram
          4. 6.16.9.2.4 STANDBY Mode Timing Requirements
          5. 6.16.9.2.5 STANDBY Mode Switching Characteristics
          6. 6.16.9.2.6 STANDBY Entry and Exit Timing Diagram
      10. 6.16.10 External Memory Interface (EMIF)
        1. 6.16.10.1 Asynchronous Memory Support
        2. 6.16.10.2 Synchronous DRAM Support
        3. 6.16.10.3 EMIF Electrical Data and Timing
          1. 6.16.10.3.1 EMIF Synchronous Memory Timing Requirements
          2. 6.16.10.3.2 EMIF Synchronous Memory Switching Characteristics
          3. 6.16.10.3.3 EMIF Synchronous Memory Timing Diagrams
          4. 6.16.10.3.4 EMIF Asynchronous Memory Timing Requirements
          5. 6.16.10.3.5 EMIF Asynchronous Memory Switching Characteristics
          6. 6.16.10.3.6 EMIF Asynchronous Memory Timing Diagrams
    17. 6.17 C29x Analog Peripherals
      1. 6.17.1 Analog Subsystem
        1. 6.17.1.1 Features
        2. 6.17.1.2 Block Diagram
        3. 6.17.1.3 Analog Pin Connections
      2. 6.17.2 Analog-to-Digital Converter (ADC)
        1. 6.17.2.1 ADC Configurability
          1. 6.17.2.1.1 Signal Mode
        2. 6.17.2.2 ADC Electrical Data and Timing
          1. 6.17.2.2.1  ADC Operating Conditions 12-bit Single-Ended
          2. 6.17.2.2.2  ADC Operating Conditions 12-bit Differential
          3. 6.17.2.2.3  ADC Operating Conditions 16-bit Single-Ended
          4. 6.17.2.2.4  ADC Operating Conditions 16-bit Differential
          5. 6.17.2.2.5  ADC Timing Requirements
          6. 6.17.2.2.6  ADC Characteristics 12-bit Single-Ended
          7. 6.17.2.2.7  ADC Characteristics 12-bit Differential
          8. 6.17.2.2.8  ADC Characteristics 16-bit Single-Ended
          9. 6.17.2.2.9  ADC Characteristics 16-bit Differential
          10. 6.17.2.2.10 ADC INL and DNL
          11. 6.17.2.2.11 ADC Performance Per Pin
          12. 6.17.2.2.12 ADC Input Models
          13. 6.17.2.2.13 ADC Timing Diagrams
      3. 6.17.3 Temperature Sensor
        1. 6.17.3.1 Temperature Sensor Electrical Data and Timing
          1. 6.17.3.1.1 Temperature Sensor Characteristics
      4. 6.17.4 Comparator Subsystem (CMPSS)
        1. 6.17.4.1 CMPSS Connectivity Diagram
        2. 6.17.4.2 Block Diagram
        3. 6.17.4.3 CMPSS Electrical Data and Timing
          1. 6.17.4.3.1 Comparator Electrical Characteristics
          2.        CMPSS Comparator Input Referred Offset and Hysteresis
          3. 6.17.4.3.2 CMPSS DAC Static Electrical Characteristics
          4. 6.17.4.3.3 CMPSS Illustrative Graphs
      5. 6.17.5 Buffered Digital-to-Analog Converter (DAC)
        1. 6.17.5.1 Buffered DAC Electrical Data and Timing
          1. 6.17.5.1.1 Buffered DAC Operating Conditions
          2. 6.17.5.1.2 Buffered DAC Electrical Characteristics
    18. 6.18 C29x Control Peripherals
      1. 6.18.1 Enhanced Capture (eCAP)
        1. 6.18.1.1 eCAP Block Diagram
        2. 6.18.1.2 eCAP Synchronization
        3. 6.18.1.3 eCAP Electrical Data and Timing
          1. 6.18.1.3.1 eCAP Timing Requirements
          2. 6.18.1.3.2 eCAP Switching Characteristics
      2. 6.18.2 High-Resolution Capture (HRCAP)
        1. 6.18.2.1 eCAP and HRCAP Block Diagram
        2. 6.18.2.2 HRCAP Electrical Data and Timing
          1. 6.18.2.2.1 HRCAP Switching Characteristics
          2. 6.18.2.2.2 HRCAP Figure and Graph
      3. 6.18.3 Enhanced Pulse Width Modulator (ePWM)
        1. 6.18.3.1 Control Peripherals Synchronization
        2. 6.18.3.2 ePWM Electrical Data and Timing
          1. 6.18.3.2.1 ePWM Timing Requirements
          2. 6.18.3.2.2 ePWM Switching Characteristics
          3. 6.18.3.2.3 Trip-Zone Input Timing
            1. 6.18.3.2.3.1 PWM Hi-Z Characteristics Timing Diagram
      4. 6.18.4 External ADC Start-of-Conversion Electrical Data and Timing
        1. 6.18.4.1 External ADC Start-of-Conversion Switching Characteristics
        2. 6.18.4.2 ADCSOCAO or ADCSOCBO Timing Diagram
      5. 6.18.5 High-Resolution Pulse Width Modulator (HRPWM)
        1. 6.18.5.1 HRPWM Electrical Data and Timing
          1. 6.18.5.1.1 High-Resolution PWM Characteristics
      6. 6.18.6 Enhanced Quadrature Encoder Pulse (eQEP)
        1. 6.18.6.1 eQEP Electrical Data and Timing
          1. 6.18.6.1.1 eQEP Timing Requirements
          2. 6.18.6.1.2 eQEP Switching Characteristics
      7. 6.18.7 Sigma-Delta Filter Module (SDFM)
        1. 6.18.7.1 SDFM Electrical Data and Timing
          1. 6.18.7.1.1 SDFM Electrical Data and Timing (Synchronized GPIO)
          2. 6.18.7.1.2 SDFM Electrical Data and Timing (Using ASYNC)
            1. 6.18.7.1.2.1 SDFM Timing Requirements When Using Asynchronous GPIO ASYNC Option
            2. 6.18.7.1.2.2 SDFM Timing Requirements When Using Synchronous GPIO SYNC Option
          3. 6.18.7.1.3 SDFM Timing Diagram
    19. 6.19 C29x Communications Peripherals
      1. 6.19.1 Modular Controller Area Network (MCAN)
      2. 6.19.2 Fast Serial Interface (FSI)
        1. 6.19.2.1 FSI Transmitter
          1. 6.19.2.1.1 FSITX Electrical Data and Timing
            1. 6.19.2.1.1.1 FSITX Switching Characteristics
            2. 6.19.2.1.1.2 FSITX Timings
        2. 6.19.2.2 FSI Receiver
          1. 6.19.2.2.1 FSIRX Electrical Data and Timing
            1. 6.19.2.2.1.1 FSIRX Timing Requirements
            2. 6.19.2.2.1.2 FSIRX Switching Characteristics
            3. 6.19.2.2.1.3 FSIRX Timings
        3. 6.19.2.3 FSI SPI Compatibility Mode
          1. 6.19.2.3.1 FSITX SPI Signaling Mode Electrical Data and Timing
            1. 6.19.2.3.1.1 FSITX SPI Signaling Mode Switching Characteristics
            2. 6.19.2.3.1.2 FSITX SPI Signaling Mode Timings
      3. 6.19.3 Inter-Integrated Circuit (I2C)
        1. 6.19.3.1 I2C Electrical Data and Timing
          1. 6.19.3.1.1 I2C Timing Requirements
          2. 6.19.3.1.2 I2C Switching Characteristics
          3. 6.19.3.1.3 I2C Timing Diagram
      4. 6.19.4 Power Management Bus (PMBus) Interface
        1. 6.19.4.1 PMBus Electrical Data and Timing
          1. 6.19.4.1.1 PMBus Electrical Characteristics
          2. 6.19.4.1.2 PMBus Fast Mode Switching Characteristics
          3. 6.19.4.1.3 PMBus Standard Mode Switching Characteristics
      5. 6.19.5 Serial Peripheral Interface (SPI)
        1. 6.19.5.1 SPI Controller Mode Timings
          1. 6.19.5.1.1 SPI Controller Mode Switching Characteristics Clock Phase 0
          2. 6.19.5.1.2 SPI Controller Mode Switching Characteristics Clock Phase 1
          3. 6.19.5.1.3 SPI Controller Mode Timing Requirements
          4. 6.19.5.1.4 SPI Controller Mode Timing Diagrams
        2. 6.19.5.2 SPI Peripheral Mode Timings
          1. 6.19.5.2.1 SPI Peripheral Mode Switching Characteristics
          2. 6.19.5.2.2 SPI Peripheral Mode Timing Requirements
          3. 6.19.5.2.3 SPI Peripheral Mode Timing Diagrams
      6. 6.19.6 Single Edge Nibble Transmission (SENT)
        1. 6.19.6.1 Introduction
        2. 6.19.6.2 Features
      7. 6.19.7 Local Interconnect Network (LIN)
      8. 6.19.8 EtherCAT SubordinateDevice Controller (ESC)
        1. 6.19.8.1 ESC Features
        2. 6.19.8.2 ESC Subsystem Integrated Features
        3. 6.19.8.3 EtherCAT IP Block Diagram
        4. 6.19.8.4 EtherCAT Electrical Data and Timing
          1. 6.19.8.4.1 EtherCAT Timing Requirements
          2. 6.19.8.4.2 EtherCAT Switching Characteristics
          3. 6.19.8.4.3 EtherCAT Timing Diagrams
      9. 6.19.9 Universal Asynchronous Receiver-Transmitter (UART)
  8. 7 Detailed Description
    1. 7.1  Overview
    2. 7.2  Functional Block Diagram
    3. 7.3  Error Signaling Module (ESM_C29)
      1. 7.3.1 Introduction
      2. 7.3.2 ESM Subsystem
      3. 7.3.3 System ESM
    4. 7.4  Error Aggregator
      1. 7.4.1 Error Aggregator Modules
      2. 7.4.2 Error Aggregator Interface
    5. 7.5  Memory
      1. 7.5.1 C29x Memory Map
      2. 7.5.2 Flash Memory Map
        1. 7.5.2.1 Flash MAIN Region Address Map (F29H85x, 4MB)
        2. 7.5.2.2 Flash MAIN Region Address Map (F29H85x, 2MB)
        3. 7.5.2.3 Flash MAIN Region Address Map (F29P58x, 4MB)
        4. 7.5.2.4 Flash MAIN Region Address Map (F29P58x, F29P32x 2MB)
        5. 7.5.2.5 Flash MAIN Region Address MAP (F29P329x, 1MB)
        6. 7.5.2.6 Flash Data Bank Address Map (128KB)
        7. 7.5.2.7 Flash Data Bank Address Map (256KB)
        8. 7.5.2.8 Flash BANKMGMT Region Address Map
        9. 7.5.2.9 Flash SECCFG Region Address Map
      3. 7.5.3 Peripheral Registers Memory Map
    6. 7.6  Identification
    7. 7.7  Boot ROM
      1. 7.7.1 Device Boot Sequence
      2. 7.7.2 Device Boot Modes
        1. 7.7.2.1 Default Boot Modes
        2. 7.7.2.2 Custom Boot Modes
      3. 7.7.3 Device Boot Configurations
        1. 7.7.3.1 Configuring Boot Mode Pins
        2. 7.7.3.2 Configuring Boot Mode Table Options
      4. 7.7.4 Device Boot Flow Diagrams
        1. 7.7.4.1 Device Boot Flow
        2. 7.7.4.2 CPU1 Boot Flow
        3. 7.7.4.3 Emulation Boot Flow
        4. 7.7.4.4 Stand-alone Boot Flow
      5. 7.7.5 GPIO Assignments
    8. 7.8  Security Modules and Cryptographic Accelerators
      1. 7.8.1 Security Modules
        1. 7.8.1.1 Hardware Security Module (HSM)
        2. 7.8.1.2 Cryptographic Accelerators
      2. 7.8.2 Safety and Security Unit (SSU)
        1. 7.8.2.1 System View
    9. 7.9  C29x Subsystem
      1. 7.9.1 C29 CPU Architecture
      2. 7.9.2 Peripheral Interrupt Priority and Expansion (PIPE)
        1. 7.9.2.1 Introduction
          1. 7.9.2.1.1 Features
          2. 7.9.2.1.2 Interrupt Concepts
        2. 7.9.2.2 Interrupt Controller Architecture
          1. 7.9.2.2.1 Dynamic Priority Arbitration Block
          2. 7.9.2.2.2 Post Processing Block
          3. 7.9.2.2.3 Memory-Mapped Registers
        3. 7.9.2.3 Interrupt Propagation
      3. 7.9.3 Data Logging and Trace (DLT)
        1. 7.9.3.1 Introduction
          1. 7.9.3.1.1 Features
            1. 7.9.3.1.1.1 Block Diagram
      4. 7.9.4 Waveform Analyzer Diagnostics (WADI)
        1. 7.9.4.1 WADI Overview
          1. 7.9.4.1.1 Features
          2. 7.9.4.1.2 Block Diagram
          3. 7.9.4.1.3 Description
      5. 7.9.5 Embedded Real-Time Analysis and Diagnostic (ERAD)
      6. 7.9.6 Inter-Processor Communications (IPC)
        1. 7.9.6.1 Introduction
      7. 7.9.7 Watchdog
      8. 7.9.8 Dual-Clock Comparator (DCC)
        1. 7.9.8.1 Features
        2. 7.9.8.2 Mapping of DCCx Clock Source Inputs
      9. 7.9.9 Configurable Logic Block (CLB)
    10. 7.10 Lockstep Compare Module (LCM)
  9. 8 Applications, Implementation, and Layout
    1. 8.1 Reference Design
  10. 9 Device and Documentation Support
    1. 9.1 Device Nomenclature
    2. 9.2 Markings
    3. 9.3 Tools and Software
    4. 9.4 Documentation Support
    5. 9.5 Support Resources
    6. 9.6 Trademarks
    7. 9.7 Electrostatic Discharge Caution
    8. 9.8 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Packaging Information
    2.     TRAY

7.5.3 Peripheral Registers Memory Map

Table 7-28 Peripheral Registers Memory Map
Structure DriverLib Name Base Address Frame Applicable CPU1 CPU2 CPU3 RTDMA1 RTDMA2 HSM
vbusp_cpu1
SECAP_HANDLER_REGS C29DEBUGSS_BASE 0x3001_8000 - YES - - - - -
LCM_REGS LCM_CPU_BASE 0x3003_2000 - YES - - - - -
vbus32_ethercat
ESCSS_REGS ESC_SS_BASE 0x3038_8000 - YES YES YES YES YES -
ESCSS_CONFIG_REGS ESC_SS_CONFIG_BASE 0x3038_8200 - YES YES YES YES YES -
vbus32_frame0
EPWM_REGS EPWM1_BASE 0x7000_0000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM1XCMP_BASE 0x7000_0400 YES YES YES YES YES YES -
DE_REGS EPWM1DE_BASE 0x7000_0800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM1MINDBLUT_BASE 0x7000_0C00 YES YES YES YES YES YES -
EPWM_REGS EPWM2_BASE 0x7000_1000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM2XCMP_BASE 0x7000_1400 YES YES YES YES YES YES -
DE_REGS EPWM2DE_BASE 0x7000_1800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM2MINDBLUT_BASE 0x7000_1C00 YES YES YES YES YES YES -
EPWM_REGS EPWM3_BASE 0x7000_2000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM3XCMP_BASE 0x7000_2400 YES YES YES YES YES YES -
DE_REGS EPWM3DE_BASE 0x7000_2800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM3MINDBLUT_BASE 0x7000_2C00 YES YES YES YES YES YES -
EPWM_REGS EPWM4_BASE 0x7000_3000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM4XCMP_BASE 0x7000_3400 YES YES YES YES YES YES -
DE_REGS EPWM4DE_BASE 0x7000_3800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM4MINDBLUT_BASE 0x7000_3C00 YES YES YES YES YES YES -
EPWM_REGS EPWM5_BASE 0x7000_4000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM5XCMP_BASE 0x7000_4400 YES YES YES YES YES YES -
DE_REGS EPWM5DE_BASE 0x7000_4800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM5MINDBLUT_BASE 0x7000_4C00 YES YES YES YES YES YES -
EPWM_REGS EPWM6_BASE 0x7000_5000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM6XCMP_BASE 0x7000_5400 YES YES YES YES YES YES -
DE_REGS EPWM6DE_BASE 0x7000_5800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM6MINDBLUT_BASE 0x7000_5C00 YES YES YES YES YES YES -
EPWM_REGS EPWM7_BASE 0x7000_6000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM7XCMP_BASE 0x7000_6400 YES YES YES YES YES YES -
DE_REGS EPWM7DE_BASE 0x7000_6800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM7MINDBLUT_BASE 0x7000_6C00 YES YES YES YES YES YES -
EPWM_REGS EPWM8_BASE 0x7000_7000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM8XCMP_BASE 0x7000_7400 YES YES YES YES YES YES -
DE_REGS EPWM8DE_BASE 0x7000_7800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM8MINDBLUT_BASE 0x7000_7C00 YES YES YES YES YES YES -
EPWM_REGS EPWM9_BASE 0x7000_8000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM9XCMP_BASE 0x7000_8400 YES YES YES YES YES YES -
DE_REGS EPWM9DE_BASE 0x7000_8800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM9MINDBLUT_BASE 0x7000_8C00 YES YES YES YES YES YES -
EPWM_REGS EPWM10_BASE 0x7000_9000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM10XCMP_BASE 0x7000_9400 YES YES YES YES YES YES -
DE_REGS EPWM10DE_BASE 0x7000_9800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM10MINDBLUT_BASE 0x7000_9C00 YES YES YES YES YES YES -
EPWM_REGS EPWM11_BASE 0x7000_A000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM11XCMP_BASE 0x7000_A400 YES YES YES YES YES YES -
DE_REGS EPWM11DE_BASE 0x7000_A800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM11MINDBLUT_BASE 0x7000_AC00 YES YES YES YES YES YES -
EPWM_REGS EPWM12_BASE 0x7000_B000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM12XCMP_BASE 0x7000_B400 YES YES YES YES YES YES -
DE_REGS EPWM12DE_BASE 0x7000_B800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM12MINDBLUT_BASE 0x7000_BC00 YES YES YES YES YES YES -
EPWM_REGS EPWM13_BASE 0x7000_C000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM13XCMP_BASE 0x7000_C400 YES YES YES YES YES YES -
DE_REGS EPWM13DE_BASE 0x7000_C800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM13MINDBLUT_BASE 0x7000_CC00 YES YES YES YES YES YES -
EPWM_REGS EPWM14_BASE 0x7000_D000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM14XCMP_BASE 0x7000_D400 YES YES YES YES YES YES -
DE_REGS EPWM14DE_BASE 0x7000_D800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM14MINDBLUT_BASE 0x7000_DC00 YES YES YES YES YES YES -
EPWM_REGS EPWM15_BASE 0x7000_E000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM15XCMP_BASE 0x7000_E400 YES YES YES YES YES YES -
DE_REGS EPWM15DE_BASE 0x7000_E800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM15MINDBLUT_BASE 0x7000_EC00 YES YES YES YES YES YES -
EPWM_REGS EPWM16_BASE 0x7000_F000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM16XCMP_BASE 0x7000_F400 YES YES YES YES YES YES -
DE_REGS EPWM16DE_BASE 0x7000_F800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM16MINDBLUT_BASE 0x7000_FC00 YES YES YES YES YES YES -
EPWM_REGS EPWM17_BASE 0x7001_0000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM17XCMP_BASE 0x7001_0400 YES YES YES YES YES YES -
DE_REGS EPWM17DE_BASE 0x7001_0800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM17MINDBLUT_BASE 0x7001_0C00 YES YES YES YES YES YES -
EPWM_REGS EPWM18_BASE 0x7001_1000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM18XCMP_BASE 0x7001_1400 YES YES YES YES YES YES -
DE_REGS EPWM18DE_BASE 0x7001_1800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM18MINDBLUT_BASE 0x7001_1C00 YES YES YES YES YES YES -
EPWM_REGS EPWM1XLINK_BASE 0x7004_0000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM1XCMPXLINK_BASE 0x7004_0400 YES YES YES YES YES YES -
DE_REGS EPWM1DEXLINK_BASE 0x7004_0800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM1MINDBLUTXLINK_BASE 0x7004_0C00 YES YES YES YES YES YES -
EPWM_REGS EPWM2XLINK_BASE 0x7004_1000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM2XCMPXLINK_BASE 0x7004_1400 YES YES YES YES YES YES -
DE_REGS EPWM2DEXLINK_BASE 0x7004_1800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM2MINDBLUTXLINK_BASE 0x7004_1C00 YES YES YES YES YES YES -
EPWM_REGS EPWM3XLINK_BASE 0x7004_2000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM3XCMPXLINK_BASE 0x7004_2400 YES YES YES YES YES YES -
DE_REGS EPWM3DEXLINK_BASE 0x7004_2800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM3MINDBLUTXLINK_BASE 0x7004_2C00 YES YES YES YES YES YES -
EPWM_REGS EPWM4XLINK_BASE 0x7004_3000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM4XCMPXLINK_BASE 0x7004_3400 YES YES YES YES YES YES -
DE_REGS EPWM4DEXLINK_BASE 0x7004_3800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM4MINDBLUTXLINK_BASE 0x7004_3C00 YES YES YES YES YES YES -
EPWM_REGS EPWM5XLINK_BASE 0x7004_4000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM5XCMPXLINK_BASE 0x7004_4400 YES YES YES YES YES YES -
DE_REGS EPWM5DEXLINK_BASE 0x7004_4800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM5MINDBLUTXLINK_BASE 0x7004_4C00 YES YES YES YES YES YES -
EPWM_REGS EPWM6XLINK_BASE 0x7004_5000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM6XCMPXLINK_BASE 0x7004_5400 YES YES YES YES YES YES -
DE_REGS EPWM6DEXLINK_BASE 0x7004_5800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM6MINDBLUTXLINK_BASE 0x7004_5C00 YES YES YES YES YES YES -
EPWM_REGS EPWM7XLINK_BASE 0x7004_6000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM7XCMPXLINK_BASE 0x7004_6400 YES YES YES YES YES YES -
DE_REGS EPWM7DEXLINK_BASE 0x7004_6800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM7MINDBLUTXLINK_BASE 0x7004_6C00 YES YES YES YES YES YES -
EPWM_REGS EPWM8XLINK_BASE 0x7004_7000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM8XCMPXLINK_BASE 0x7004_7400 YES YES YES YES YES YES -
DE_REGS EPWM8DEXLINK_BASE 0x7004_7800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM8MINDBLUTXLINK_BASE 0x7004_7C00 YES YES YES YES YES YES -
EPWM_REGS EPWM9XLINK_BASE 0x7004_8000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM9XCMPXLINK_BASE 0x7004_8400 YES YES YES YES YES YES -
DE_REGS EPWM9DEXLINK_BASE 0x7004_8800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM9MINDBLUTXLINK_BASE 0x7004_8C00 YES YES YES YES YES YES -
EPWM_REGS EPWM10XLINK_BASE 0x7004_9000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM10XCMPXLINK_BASE 0x7004_9400 YES YES YES YES YES YES -
DE_REGS EPWM10DEXLINK_BASE 0x7004_9800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM10MINDBLUTXLINK_BASE 0x7004_9C00 YES YES YES YES YES YES -
EPWM_REGS EPWM11XLINK_BASE 0x7004_A000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM11XCMPXLINK_BASE 0x7004_A400 YES YES YES YES YES YES -
DE_REGS EPWM11DEXLINK_BASE 0x7004_A800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM11MINDBLUTXLINK_BASE 0x7004_AC00 YES YES YES YES YES YES -
EPWM_REGS EPWM12XLINK_BASE 0x7004_B000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM12XCMPXLINK_BASE 0x7004_B400 YES YES YES YES YES YES -
DE_REGS EPWM12DEXLINK_BASE 0x7004_B800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM12MINDBLUTXLINK_BASE 0x7004_BC00 YES YES YES YES YES YES -
EPWM_REGS EPWM13XLINK_BASE 0x7004_C000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM13XCMPXLINK_BASE 0x7004_C400 YES YES YES YES YES YES -
DE_REGS EPWM13DEXLINK_BASE 0x7004_C800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM13MINDBLUTXLINK_BASE 0x7004_CC00 YES YES YES YES YES YES -
EPWM_REGS EPWM14XLINK_BASE 0x7004_D000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM14XCMPXLINK_BASE 0x7004_D400 YES YES YES YES YES YES -
DE_REGS EPWM14DEXLINK_BASE 0x7004_D800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM14MINDBLUTXLINK_BASE 0x7004_DC00 YES YES YES YES YES YES -
EPWM_REGS EPWM15XLINK_BASE 0x7004_E000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM15XCMPXLINK_BASE 0x7004_E400 YES YES YES YES YES YES -
DE_REGS EPWM15DEXLINK_BASE 0x7004_E800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM15MINDBLUTXLINK_BASE 0x7004_EC00 YES YES YES YES YES YES -
EPWM_REGS EPWM16XLINK_BASE 0x7004_F000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM16XCMPXLINK_BASE 0x7004_F400 YES YES YES YES YES YES -
DE_REGS EPWM16DEXLINK_BASE 0x7004_F800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM16MINDBLUTXLINK_BASE 0x7004_FC00 YES YES YES YES YES YES -
EPWM_REGS EPWM17XLINK_BASE 0x7005_0000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM17XCMPXLINK_BASE 0x7005_0400 YES YES YES YES YES YES -
DE_REGS EPWM17DEXLINK_BASE 0x7005_0800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM17MINDBLUTXLINK_BASE 0x7005_0C00 YES YES YES YES YES YES -
EPWM_REGS EPWM18XLINK_BASE 0x7005_1000 YES YES YES YES YES YES -
EPWM_XCMP_REGS EPWM18XCMPXLINK_BASE 0x7005_1400 YES YES YES YES YES YES -
DE_REGS EPWM18DEXLINK_BASE 0x7005_1800 YES YES YES YES YES YES -
MINDB_LUT_REGS EPWM18MINDBLUTXLINK_BASE 0x7005_1C00 YES YES YES YES YES YES -
HRPWMCAL_REGS HRPWMCAL1_BASE 0x7008_0000 YES YES YES YES YES YES -
HRPWMCAL_REGS HRPWMCAL2_BASE 0x7008_1000 YES YES YES YES YES YES -
HRPWMCAL_REGS HRPWMCAL3_BASE 0x7008_2000 YES YES YES YES YES YES -
EQEP_REGS EQEP1_BASE 0x7008_8000 YES YES YES YES YES YES -
EQEP_REGS EQEP2_BASE 0x7008_9000 YES YES YES YES YES YES -
EQEP_REGS EQEP3_BASE 0x7008_A000 YES YES YES YES YES YES -
EQEP_REGS EQEP4_BASE 0x7008_B000 YES YES YES YES YES YES -
EQEP_REGS EQEP5_BASE 0x7008_C000 YES YES YES YES YES YES -
EQEP_REGS EQEP6_BASE 0x7008_D000 YES YES YES YES YES YES -
SDFM_REGS SDFM1_BASE 0x7009_0000 YES YES YES YES YES YES -
SDFM_REGS SDFM2_BASE 0x7009_1000 YES YES YES YES YES YES -
SDFM_REGS SDFM3_BASE 0x7009_2000 YES YES YES YES YES YES -
SDFM_REGS SDFM4_BASE 0x7009_3000 YES YES YES YES YES YES -
ADC_REGS ADCA_BASE 0x700A_0000 YES YES YES YES YES YES -
ADC_REGS ADCB_BASE 0x700A_1000 YES YES YES YES YES YES -
ADC_REGS ADCC_BASE 0x700A_2000 YES YES YES YES YES YES -
ADC_REGS ADCD_BASE 0x700A_3000 YES YES YES YES YES YES -
ADC_REGS ADCE_BASE 0x700A_4000 YES YES YES YES YES YES -
ADC_SAFECHECK_REGS ADCSAFETYCHECK1_BASE 0x700B_0000 YES YES YES YES YES YES -
ADC_SAFECHECK_REGS ADCSAFETYCHECK2_BASE 0x700B_1000 YES YES YES YES YES YES -
ADC_SAFECHECK_REGS ADCSAFETYCHECK3_BASE 0x700B_2000 YES YES YES YES YES YES -
ADC_SAFECHECK_REGS ADCSAFETYCHECK4_BASE 0x700B_3000 YES YES YES YES YES YES -
ADC_SAFECHECK_REGS ADCSAFETYCHECK5_BASE 0x700B_4000 YES YES YES YES YES YES -
ADC_SAFECHECK_REGS ADCSAFETYCHECK6_BASE 0x700B_5000 YES YES YES YES YES YES -
ADC_SAFECHECK_REGS ADCSAFETYCHECK7_BASE 0x700B_6000 YES YES YES YES YES YES -
ADC_SAFECHECK_REGS ADCSAFETYCHECK8_BASE 0x700B_7000 YES YES YES YES YES YES -
ADC_SAFECHECK_REGS ADCSAFETYCHECK9_BASE 0x700B_8000 YES YES YES YES YES YES -
ADC_SAFECHECK_REGS ADCSAFETYCHECK10_BASE 0x700B_9000 YES YES YES YES YES YES -
ADC_SAFECHECK_INTEVT_REGS ADCSAFETYCHECKINTEVT1_BASE 0x700C_0000 YES YES YES YES YES YES -
ADC_SAFECHECK_INTEVT_REGS ADCSAFETYCHECKINTEVT2_BASE 0x700C_1000 YES YES YES YES YES YES -
ADC_SAFECHECK_INTEVT_REGS ADCSAFETYCHECKINTEVT3_BASE 0x700C_2000 YES YES YES YES YES YES -
ADC_GLOBAL_REGS ADCGLOBAL_BASE 0x700C_8000 YES YES YES YES YES YES -
DAC_REGS DACA_BASE 0x700D_0000 YES YES YES YES YES YES -
DAC_REGS DACB_BASE 0x700D_1000 YES YES YES YES YES YES -
CMPSS_REGS CMPSS1_BASE 0x700E_0000 YES YES YES YES YES YES -
CMPSS_REGS CMPSS2_BASE 0x700E_1000 YES YES YES YES YES YES -
CMPSS_REGS CMPSS3_BASE 0x700E_2000 YES YES YES YES YES YES -
CMPSS_REGS CMPSS4_BASE 0x700E_3000 YES YES YES YES YES YES -
CMPSS_REGS CMPSS5_BASE 0x700E_4000 YES YES YES YES YES YES -
CMPSS_REGS CMPSS6_BASE 0x700E_5000 YES YES YES YES YES YES -
CMPSS_REGS CMPSS7_BASE 0x700E_6000 YES YES YES YES YES YES -
CMPSS_REGS CMPSS8_BASE 0x700E_7000 YES YES YES YES YES YES -
CMPSS_REGS CMPSS9_BASE 0x700E_8000 YES YES YES YES YES YES -
CMPSS_REGS CMPSS10_BASE 0x700E_9000 YES YES YES YES YES YES -
CMPSS_REGS CMPSS11_BASE 0x700E_A000 YES YES YES YES YES YES -
CMPSS_REGS CMPSS12_BASE 0x700E_B000 YES YES YES YES YES YES -
ECAP_REGS ECAP1_BASE 0x7010_0000 YES YES YES YES YES YES -
ECAP_SIGNAL_MONITORING ECAP1SIGNALMONITORING_BASE 0x7010_0080 YES YES YES YES YES YES -
ECAP_REGS ECAP2_BASE 0x7010_1000 YES YES YES YES YES YES -
ECAP_SIGNAL_MONITORING ECAP2SIGNALMONITORING_BASE 0x7010_1080 YES YES YES YES YES YES -
ECAP_REGS ECAP3_BASE 0x7010_2000 YES YES YES YES YES YES -
ECAP_SIGNAL_MONITORING ECAP3SIGNALMONITORING_BASE 0x7010_2080 YES YES YES YES YES YES -
ECAP_REGS ECAP4_BASE 0x7010_3000 YES YES YES YES YES YES -
ECAP_SIGNAL_MONITORING ECAP4SIGNALMONITORING_BASE 0x7010_3080 YES YES YES YES YES YES -
ECAP_REGS ECAP5_BASE 0x7010_4000 YES YES YES YES YES YES -
HRCAP_REGS HRCAP5_BASE 0x7010_4040 YES YES YES YES YES YES -
ECAP_SIGNAL_MONITORING ECAP5SIGNALMONITORING_BASE 0x7010_4080 YES YES YES YES YES YES -
ECAP_REGS ECAP6_BASE 0x7010_5000 YES YES YES YES YES YES -
HRCAP_REGS HRCAP6_BASE 0x7010_5040 YES YES YES YES YES YES -
ECAP_SIGNAL_MONITORING ECAP6SIGNALMONITORING_BASE 0x7010_5080 YES YES YES YES YES YES -
CLB_LOGIC_CONFIG_REGS CLB1_LOGICCFG_BASE 0x7012_0000 YES YES YES YES YES YES -
CLB_LOGIC_CONTROL_REGS CLB1_LOGICCTRL_BASE 0x7012_0200 YES YES YES YES YES YES -
CLB_DATA_EXCHANGE_REGS CLB1_DATAEXCH_BASE 0x7012_0300 YES YES YES YES YES YES -
CLB_LOGIC_CONFIG_REGS CLB2_LOGICCFG_BASE 0x7012_1000 YES YES YES YES YES YES -
CLB_LOGIC_CONTROL_REGS CLB2_LOGICCTRL_BASE 0x7012_1200 YES YES YES YES YES YES -
CLB_DATA_EXCHANGE_REGS CLB2_DATAEXCH_BASE 0x7012_1300 YES YES YES YES YES YES -
CLB_LOGIC_CONFIG_REGS CLB3_LOGICCFG_BASE 0x7012_2000 YES YES YES YES YES YES -
CLB_LOGIC_CONTROL_REGS CLB3_LOGICCTRL_BASE 0x7012_2200 YES YES YES YES YES YES -
CLB_DATA_EXCHANGE_REGS CLB3_DATAEXCH_BASE 0x7012_2300 YES YES YES YES YES YES -
CLB_LOGIC_CONFIG_REGS CLB4_LOGICCFG_BASE 0x7012_3000 YES YES YES YES YES YES -
CLB_LOGIC_CONTROL_REGS CLB4_LOGICCTRL_BASE 0x7012_3200 YES YES YES YES YES YES -
CLB_DATA_EXCHANGE_REGS CLB4_DATAEXCH_BASE 0x7012_3300 YES YES YES YES YES YES -
CLB_LOGIC_CONFIG_REGS CLB5_LOGICCFG_BASE 0x7012_4000 YES YES YES YES YES YES -
CLB_LOGIC_CONTROL_REGS CLB5_LOGICCTRL_BASE 0x7012_4200 YES YES YES YES YES YES -
CLB_DATA_EXCHANGE_REGS CLB5_DATAEXCH_BASE 0x7012_4300 YES YES YES YES YES YES -
CLB_LOGIC_CONFIG_REGS CLB6_LOGICCFG_BASE 0x7012_5000 YES YES YES YES YES YES -
CLB_LOGIC_CONTROL_REGS CLB6_LOGICCTRL_BASE 0x7012_5200 YES YES YES YES YES YES -
CLB_DATA_EXCHANGE_REGS CLB6_DATAEXCH_BASE 0x7012_5300 YES YES YES YES YES YES -
PMBUS_REGS PMBUSA_BASE 0x7014_8000 YES YES YES YES YES YES -
I2C_REGS I2CA_BASE 0x7015_0000 YES YES YES YES YES YES -
I2C_REGS I2CB_BASE 0x7015_1000 YES YES YES YES YES YES -
SPI_REGS SPIA_BASE 0x7015_8000 YES YES YES YES YES YES -
SPI_REGS SPIB_BASE 0x7015_9000 YES YES YES YES YES YES -
SPI_REGS SPIC_BASE 0x7015_A000 YES YES YES YES YES YES -
SPI_REGS SPID_BASE 0x7015_B000 YES YES YES YES YES YES -
SPI_REGS SPIE_BASE 0x7015_C000 YES YES YES YES YES YES -
FSI_TX_REGS FSITXA_BASE 0x7018_0000 YES YES YES YES YES YES -
FSI_TX_REGS FSITXB_BASE 0x7018_1000 YES YES YES YES YES YES -
FSI_TX_REGS FSITXC_BASE 0x7018_2000 YES YES YES YES YES YES -
FSI_TX_REGS FSITXD_BASE 0x7018_3000 YES YES YES YES YES YES -
FSI_RX_REGS FSIRXA_BASE 0x7018_8000 YES YES YES YES YES YES -
FSI_RX_REGS FSIRXB_BASE 0x7018_9000 YES YES YES YES YES YES -
FSI_RX_REGS FSIRXC_BASE 0x7018_A000 YES YES YES YES YES YES -
FSI_RX_REGS FSIRXD_BASE 0x7018_B000 YES YES YES YES YES YES -
EPG_REGS EPG_BASE 0x701C_0000 YES YES YES YES YES YES -
EPG_MUX_REGS EPGMUX_BASE 0x701C_0200 YES YES YES YES YES YES -
soc_to_hsm_bridge
HSM_DTHE_REGS DTHE_BASE 0x3028_0000 - YES YES YES YES YES -
HSM_DTHE_CRC_S_REGS CRCS_BASE 0x3028_1000 - YES YES YES YES YES -
HSM_DTHE_CRC_P_REGS CRCP_BASE 0x3028_2000 - YES YES YES YES YES -
HSM_SHA_S_REGS SHAS_BASE 0x3028_4000 - YES YES YES YES YES -
HSM_SHA_P_REGS SHAP_BASE 0x3028_5000 - YES YES YES YES YES -
HSM_AES_S_REGS AESS_BASE 0x3028_6000 - YES YES YES YES YES -
HSM_AES_P_REGS AESP_BASE 0x3028_7000 - YES YES YES YES YES -
HSM_SM4_REGS SM4_BASE 0x3028_8000 - YES YES YES YES YES -
HSM_SM3_REGS SM3_BASE 0x3028_9000 - YES YES YES YES YES -
HSM_TRNG_REGS TRNG_BASE 0x3028_A000 - YES YES YES YES YES -
HSM_PKE_REGS PKE_BASE 0x3029_0000 - YES YES YES YES YES -
vbusp_prog
FLASH_CMD_REGS_FLC1 FLASHCONTROLLER1_BASE 0x3010_0000 - YES - YES - - YES
FLASH_CMD_REGS_FLC2 FLASHCONTROLLER2_BASE 0x3011_0000 - YES - YES - - YES
HSM_ERROR_AGGREGATOR_CONFIG_REGS HSMERRORAGGREGATOR_BASE 0x3012_0000 - - - - - - YES
vbus32_config
DEV_CFG_REGS DEVCFG_BASE 0x3018_0000 - YES YES YES - - YES
ANALOG_SUBSYS_REGS ANALOGSUBSYS_BASE 0x3018_2000 - YES YES YES - - YES
GPIO_CTRL_REGS GPIOCTRL_BASE 0x3019_0000 - YES YES YES - - YES
IPC_COUNTER_REGS IPCCOUNTER_BASE 0x301B_0000 - YES YES YES - - YES
c29bus
ADC_RESULT_REGS ADCARESULT_BASE 0x303C_0000 - YES YES YES YES YES -
ADC_RESULT_REGS ADCBRESULT_BASE 0x303C_1000 - YES YES YES YES YES -
ADC_RESULT_REGS ADCCRESULT_BASE 0x303C_2000 - YES YES YES YES YES -
ADC_RESULT_REGS ADCDRESULT_BASE 0x303C_3000 - YES YES YES YES YES -
ADC_RESULT_REGS ADCERESULT_BASE 0x303C_4000 - YES YES YES YES YES -
EMIF_REGS EMIF1_BASE 0x3080_0000 - YES YES YES - - -
vbusp_config
RTDMA_REGS RTDMA1_BASE 0x301C_0000 - YES YES YES - - YES
RTDMA_DIAG_REGS RTDMA1_DIAG_BASE 0x301C_0800 - YES YES YES - - YES
RTDMA_SELFTEST_REGS RTDMA1_SELFTEST_BASE 0x301C_0C00 - YES YES YES - - YES
RTDMA_MPU_REGS RTDMA1_MPU_BASE 0x301C_1000 - YES YES YES - - YES
RTDMA_REGS RTDMA2_BASE 0x301C_8000 - YES YES YES - - YES
RTDMA_DIAG_REGS RTDMA2_DIAG_BASE 0x301C_8800 - YES YES YES - - YES
RTDMA_SELFTEST_REGS RTDMA2_SELFTEST_BASE 0x301C_8C00 - YES YES YES - - YES
RTDMA_MPU_REGS RTDMA2_MPU_BASE 0x301C_9000 - YES YES YES - - YES
FRI_CTRL_REGS FRI1_BASE 0x301D_0000 - YES YES YES - - YES
MEMSS_L_CONFIG_REGS MEMSSLCFG_BASE 0x301D_8000 - YES YES YES - - YES
MEMSS_C_CONFIG_REGS MEMSSCCFG_BASE 0x301D_8400 - YES YES YES - - YES
MEMSS_M_CONFIG_REGS MEMSSMCFG_BASE 0x301D_8800 - YES YES YES - - YES
MEMSS_MISCI_REGS MEMSSMISCI_BASE 0x301D_8E00 - YES YES YES - - YES
SYNCBRIDGEMPU_REGS SYNCBRIDGEMPU_BASE 0x301E_0000 - YES YES YES - - YES
INPUT_XBAR_REGS INPUTXBAR_BASE 0x301E_8000 - YES YES YES - - YES
EPWM_XBAR_REGS EPWMXBAR_BASE 0x301E_9000 - YES YES YES - - YES
CLB_XBAR_REGS CLBXBAR_BASE 0x301E_A000 - YES YES YES - - YES
OUTPUTXBAR_REGS OUTPUTXBAR_BASE 0x301E_B000 - YES YES YES - - YES
MDL_XBAR_REGS MDLXBAR_BASE 0x301E_C000 - YES YES YES - - YES
ICL_XBAR_REGS ICLXBAR_BASE 0x301E_D000 - YES YES YES - - YES
LCM_REGS LCM_DMA_BASE 0x301F_4000 - YES YES YES - - YES
vbusp_frame0
RTDMA_CH_REGS RTDMA1CH1_BASE 0x6000_0000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA1CH2_BASE 0x6000_1000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA1CH3_BASE 0x6000_2000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA1CH4_BASE 0x6000_3000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA1CH5_BASE 0x6000_4000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA1CH6_BASE 0x6000_5000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA1CH7_BASE 0x6000_6000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA1CH8_BASE 0x6000_7000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA1CH9_BASE 0x6000_8000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA1CH10_BASE 0x6000_9000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA2CH1_BASE 0x6001_0000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA2CH2_BASE 0x6001_1000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA2CH3_BASE 0x6001_2000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA2CH4_BASE 0x6001_3000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA2CH5_BASE 0x6001_4000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA2CH6_BASE 0x6001_5000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA2CH7_BASE 0x6001_6000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA2CH8_BASE 0x6001_7000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA2CH9_BASE 0x6001_8000 YES YES YES YES YES YES -
RTDMA_CH_REGS RTDMA2CH10_BASE 0x6001_9000 YES YES YES YES YES YES -
MCANSS_REGS MCANASS_BASE 0x6002_4000 YES YES YES YES YES YES -
MCAN_REGS MCANA_BASE 0x6002_4600 YES YES YES YES YES YES -
MCAN_ERROR_REGS MCANA_ERROR_BASE 0x6002_4800 YES YES YES YES YES YES -
MCANSS_REGS MCANBSS_BASE 0x6002_C000 YES YES YES YES YES YES -
MCAN_REGS MCANB_BASE 0x6002_C600 YES YES YES YES YES YES -
MCAN_ERROR_REGS MCANB_ERROR_BASE 0x6002_C800 YES YES YES YES YES YES -
MCANSS_REGS MCANCSS_BASE 0x6003_4000 YES YES YES YES YES YES -
MCAN_REGS MCANC_BASE 0x6003_4600 YES YES YES YES YES YES -
MCAN_ERROR_REGS MCANC_ERROR_BASE 0x6003_4800 YES YES YES YES YES YES -
MCANSS_REGS MCANDSS_BASE 0x6003_C000 YES YES YES YES YES YES -
MCAN_REGS MCAND_BASE 0x6003_C600 YES YES YES YES YES YES -
MCAN_ERROR_REGS MCAND_ERROR_BASE 0x6003_C800 YES YES YES YES YES YES -
MCANSS_REGS MCANESS_BASE 0x6004_4000 YES YES YES YES YES YES -
MCAN_REGS MCANE_BASE 0x6004_4600 YES YES YES YES YES YES -
MCAN_ERROR_REGS MCANE_ERROR_BASE 0x6004_4800 YES YES YES YES YES YES -
MCANSS_REGS MCANFSS_BASE 0x6004_C000 YES YES YES YES YES YES -
MCAN_REGS MCANF_BASE 0x6004_C600 YES YES YES YES YES YES -
MCAN_ERROR_REGS MCANF_ERROR_BASE 0x6004_C800 YES YES YES YES YES YES -
LIN_REGS LINA_BASE 0x6006_0000 YES YES YES YES YES YES -
LIN_REGS LINB_BASE 0x6006_1000 YES YES YES YES YES YES -
SENT_CFG SENT1CSENT_BASE 0x6006_8000 YES YES YES YES YES YES -
SENT_MEM SENT1MEM_BASE 0x6006_8400 YES YES YES YES YES YES -
SENT_MTPG SENT1MTPG_BASE 0x6006_8800 YES YES YES YES YES YES -
SENT_CFG SENT2CSENT_BASE 0x6006_9000 YES YES YES YES YES YES -
SENT_MEM SENT2MEM_BASE 0x6006_9400 YES YES YES YES YES YES -
SENT_MTPG SENT2MTPG_BASE 0x6006_9800 YES YES YES YES YES YES -
SENT_CFG SENT3CSENT_BASE 0x6006_A000 YES YES YES YES YES YES -
SENT_MEM SENT3MEM_BASE 0x6006_A400 YES YES YES YES YES YES -
SENT_MTPG SENT3MTPG_BASE 0x6006_A800 YES YES YES YES YES YES -
SENT_CFG SENT4CSENT_BASE 0x6006_B000 YES YES YES YES YES YES -
SENT_MEM SENT4MEM_BASE 0x6006_B400 YES YES YES YES YES YES -
SENT_MTPG SENT4MTPG_BASE 0x6006_B800 YES YES YES YES YES YES -
SENT_CFG SENT5CSENT_BASE 0x6006_C000 YES YES YES YES YES YES -
SENT_MEM SENT5MEM_BASE 0x6006_C400 YES YES YES YES YES YES -
SENT_MTPG SENT5MTPG_BASE 0x6006_C800 YES YES YES YES YES YES -
SENT_CFG SENT6CSENT_BASE 0x6006_D000 YES YES YES YES YES YES -
SENT_MEM SENT6MEM_BASE 0x6006_D400 YES YES YES YES YES YES -
SENT_MTPG SENT6MTPG_BASE 0x6006_D800 YES YES YES YES YES YES -
UART_REGS, UART_REGS_WRITE UARTA_BASE, UARTA_WRITE_BASE 0x6007_0000 YES YES YES YES YES YES -
UART_REGS, UART_REGS_WRITE UARTB_BASE, UARTB_WRITE_BASE 0x6007_2000 YES YES YES YES YES YES -
UART_REGS, UART_REGS_WRITE UARTC_BASE, UARTC_WRITE_BASE 0x6007_4000 YES YES YES YES YES YES -
UART_REGS, UART_REGS_WRITE UARTD_BASE, UARTD_WRITE_BASE 0x6007_6000 YES YES YES YES YES YES -
UART_REGS, UART_REGS_WRITE UARTE_BASE, UARTE_WRITE_BASE 0x6007_8000 YES YES YES YES YES YES -
UART_REGS, UART_REGS_WRITE UARTF_BASE, UARTF_WRITE_BASE 0x6007_A000 YES YES YES YES YES YES -
DCC_REGS DCC1_BASE 0x6008_0000 YES YES YES YES YES YES -
DCC_REGS DCC2_BASE 0x6008_1000 YES YES YES YES YES YES -
DCC_REGS DCC3_BASE 0x6008_2000 YES YES YES YES YES YES -
ERROR_AGGREGATOR_CONFIG_REGS ERRORAGGREGATOR_BASE 0x6008_C000 YES YES YES YES YES YES -
ESM_CPU_REGS ESMCPU1_BASE 0x6009_0000 YES YES YES YES YES YES -
ESM_CPU_REGS ESMCPU2_BASE 0x6009_1000 YES YES YES YES YES YES -
ESM_CPU_REGS ESMCPU3_BASE 0x6009_2000 YES YES YES YES YES YES -
ESM_SYSTEM_REGS ESMSYSTEM_BASE 0x6009_F000 YES YES YES YES YES YES -
ESM_SAFETYAGG_REGS ESMSAFETYAGG_BASE 0x600A_0000 YES YES YES YES YES YES -
WADI_CONFIG_REGS WADI1BLK1CONFIG_BASE 0x600B_0000 YES YES YES YES YES YES -
WADI_CONFIG_REGS WADI1BLK2CONFIG_BASE 0x600B_0100 YES YES YES YES YES YES -
WADI_CONFIG_REGS WADI1BLK3CONFIG_BASE 0x600B_0200 YES YES YES YES YES YES -
WADI_CONFIG_REGS WADI1BLK4CONFIG_BASE 0x600B_0300 YES YES YES YES YES YES -
WADI_OPER_SSS_REGS WADI1OPERSSS_BASE 0x600B_1000 YES YES YES YES YES YES -
WADI_CONFIG_REGS WADI2BLK1CONFIG_BASE 0x600B_2000 YES YES YES YES YES YES -
WADI_CONFIG_REGS WADI2BLK2CONFIG_BASE 0x600B_2100 YES YES YES YES YES YES -
WADI_CONFIG_REGS WADI2BLK3CONFIG_BASE 0x600B_2200 YES YES YES YES YES YES -
WADI_CONFIG_REGS WADI2BLK4CONFIG_BASE 0x600B_2300 YES YES YES YES YES YES -
WADI_OPER_SSS_REGS WADI2OPERSSS_BASE 0x600B_3000 YES YES YES YES YES YES -
OUTPUTXBAR_FLAG_REGS OUTPUTXBAR1_FLAGS_BASE 0x600C_0000 YES YES YES YES YES YES -
OUTPUTXBAR_FLAG_REGS OUTPUTXBAR2_FLAGS_BASE 0x600C_1000 YES YES YES YES YES YES -
OUTPUTXBAR_FLAG_REGS OUTPUTXBAR3_FLAGS_BASE 0x600C_2000 YES YES YES YES YES YES -
OUTPUTXBAR_FLAG_REGS OUTPUTXBAR4_FLAGS_BASE 0x600C_3000 YES YES YES YES YES YES -
OUTPUTXBAR_FLAG_REGS OUTPUTXBAR5_FLAGS_BASE 0x600C_4000 YES YES YES YES YES YES -
OUTPUTXBAR_FLAG_REGS OUTPUTXBAR6_FLAGS_BASE 0x600C_5000 YES YES YES YES YES YES -
OUTPUTXBAR_FLAG_REGS OUTPUTXBAR7_FLAGS_BASE 0x600C_6000 YES YES YES YES YES YES -
OUTPUTXBAR_FLAG_REGS OUTPUTXBAR8_FLAGS_BASE 0x600C_7000 YES YES YES YES YES YES -
OUTPUTXBAR_FLAG_REGS OUTPUTXBAR9_FLAGS_BASE 0x600C_8000 YES YES YES YES YES YES -
OUTPUTXBAR_FLAG_REGS OUTPUTXBAR10_FLAGS_BASE 0x600C_9000 YES YES YES YES YES YES -
OUTPUTXBAR_FLAG_REGS OUTPUTXBAR11_FLAGS_BASE 0x600C_A000 YES YES YES YES YES YES -
OUTPUTXBAR_FLAG_REGS OUTPUTXBAR12_FLAGS_BASE 0x600C_B000 YES YES YES YES YES YES -
OUTPUTXBAR_FLAG_REGS OUTPUTXBAR13_FLAGS_BASE 0x600C_C000 YES YES YES YES YES YES -
OUTPUTXBAR_FLAG_REGS OUTPUTXBAR14_FLAGS_BASE 0x600C_D000 YES YES YES YES YES YES -
OUTPUTXBAR_FLAG_REGS OUTPUTXBAR15_FLAGS_BASE 0x600C_E000 YES YES YES YES YES YES -
OUTPUTXBAR_FLAG_REGS OUTPUTXBAR16_FLAGS_BASE 0x600C_F000 YES YES YES YES YES YES -
XBAR_REGS INPUTXBAR_FLAGS_BASE 0x600E_0000 YES YES YES YES YES YES -
DLT_FIFO_REGS CPU1DLTFIFO_BASE 0x600F_8000 YES YES YES YES YES YES -
DLT_FIFO_REGS CPU2DLTFIFO_BASE 0x600F_A000 YES YES YES YES YES YES -
DLT_FIFO_REGS CPU3DLTFIFO_BASE 0x600F_C000 YES YES YES YES YES YES -
vbusp_ssu
SSU_GEN_REGS SSUGEN_BASE 0x3008_0000 - YES YES YES - - YES
SSU_CPU1_CFG_REGS SSUCPU1CFG_BASE 0x3008_1000 - YES - - - - -
SSU_CPU2_CFG_REGS SSUCPU2CFG_BASE 0x3008_2000 - YES YES - - - -
SSU_CPU3_CFG_REGS SSUCPU3CFG_BASE 0x3008_3000 - YES - YES - - -
SSU_CPU1_AP_REGS SSUCPU1AP_BASE 0x3008_7000 - YES - - - - -
SSU_CPU2_AP_REGS SSUCPU2AP_BASE 0x3008_8000 - YES YES - - - -
SSU_CPU3_AP_REGS SSUCPU3AP_BASE 0x3008_9000 - YES - YES - - -
vbus32_ap_cpu1, vbus32_ap_cpu2, vbus32_ap_cpu3
CPU_SYS_REGS CPUSYS_BASE 0x3020_0000 - YES YES YES - - -
CPU_PER_CFG_REGS CPUPERCFG_BASE 0x3020_8000 - YES YES YES - - -
WD_REGS WD_BASE 0x3020_8C00 - YES YES YES - - -
CPUTIMER_REGS CPUTIMER0_BASE 0x3021_8000 - YES YES YES - - -
CPUTIMER_REGS CPUTIMER1_BASE 0x3021_9000 - YES YES YES - - -
CPUTIMER_REGS CPUTIMER2_BASE 0x3021_A000 - YES YES YES - - -
CPU1_IPC_SEND_REGS CPU1IPCSEND_BASE 0x3022_0000 - YES YES YES - - -
CPU2_IPC_SEND_REGS CPU2IPCSEND_BASE 0x3022_8000 - YES YES YES - - -
CPU3_IPC_SEND_REGS CPU3IPCSEND_BASE 0x3023_0000 - YES YES YES - - -
CPU1_IPC_RCV_REGS CPU1IPCRCV_BASE 0x3024_0000 - YES YES YES - - -
CPU2_IPC_RCV_REGS CPU2IPCRCV_BASE 0x3024_8000 - YES YES YES - - -
CPU3_IPC_RCV_REGS CPU3IPCRCV_BASE 0x3025_0000 - YES YES YES - - -
GPIO_DATA_REGS GPIODATA_BASE 0x3026_8000 - YES YES YES - - -
GPIO_DATA_READ_REGS GPIODATAREAD_BASE 0x3026_9000 - YES YES YES - - -
XINT_REGS XINT_BASE 0x3027_0000 - YES YES YES - - -
vbusp_cpu1, vbusp_cpu2, vbusp_cpu3
C29_RTINT_STACK C29CPURTINTSTACK_BASE 0x3000_8000 - YES YES YES - - -
C29_SECCALL_STACK C29CPUSECCALLSTACK_BASE 0x3000_C000 - YES YES YES - - -
C29_SECURE_REGS C29CPUSECURE_BASE 0x3000_D000 - YES YES YES - - -
C29_DIAG_REGS C29CPUDIAG_BASE 0x3000_E000 - YES YES YES - - -
C29_SELFTEST_REGS C29CPUSELFTEST_BASE 0x3000_F000 - YES YES YES - - -
DLT_CORE_REGS CPUDLT_BASE 0x3001_0000 - YES YES YES - - -
PIPE_REGS PIPE_BASE 0x3002_0000 - YES YES YES - - -
ERAD_REGS ERAD_BASE 0x3003_0000 - YES YES YES - - -