SPRUJ28C november 2021 – june 2023 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1
The following firewalls are present in COMPUTE_CLUSTER0:
The A72SS firewalls protect the traffic generated from each A72SS and are placed on the master port side unlike most device firewalls that are on the slave port side. These firewalls have to be programed to enable the A72 master port access to the needed slaves.
The first C71SS region based firewalls (C71SS MDMA) protect the traffic generated from the C71SS and same as A72SS are placed on the master port side. The second C71SS region based firewalls protect the access to the C71SS L2 SRAM and are placed on the slave port side.
The DRU region based firewalls are intended to protect the DRU configuration registers within a programmatically specified range. The DRU channelized firewalls protect the following:
The A72SS and C71SS region based firewalls are same as the other device region based firewalls. For more information about their functionality, see Interconnect Firewalls in System Interconnect.