SPRZ575A March   2024  – April 2025 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1

 

  1.   1
  2. 1Modules Affected
  3. 2Nomenclature, Package Symbolization, and Revision Identification
    1. 2.1 Device and Development-Support Tool Nomenclature
    2. 2.2 Devices Supported
    3. 2.3 Package Symbolization and Revision Identification
  4. 3Silicon Revision 1.0 Usage Notes and Advisories
    1. 3.1 Silicon Revision 1.0 Usage Notes
      1.      i2134
    2. 3.2 Silicon Revision 1.0 Advisories
      1.      i2049
      2.      i2062
      3.      i2097
      4.      i2120
      5.      i2137
      6.      i2160
      7.      i2189
      8.      i2190
      9.      i2196
      10.      i2199
      11.      i2208
      12.      i2242
      13.      i2243
      14.      i2249
      15.      i2253
      16.      i2278
      17.      i2279
      18.      i2310
      19.      i2311
      20.      i2312
      21.      i2326
      22.      i2330
      23.      i2351
      24.      i2362
      25.      i2366
      26.      i2372
      27.      i2383
      28.      i2399
      29.      i2401
      30.      i2407
      31.      i2409
      32.      i2410
      33.      i2419
      34.      i2424
      35.      i2431
      36.      i2436
      37.      i2457
      38.      i2478
  5.   Trademarks
  6. 4Revision History

i2097


DSS: Disabling a Layer Connected to Overlay May Result in Synclost During the Next Frame

Details:

Disabling a layer (for example VID1) connected to an OVR (that is toggling DSS_VID_ATTRIBUTESx[0] ENABLE from 1 to 0) may result in synclost during the next frame. The synclost may result in a corrupted or blank frame (all pixel data sent out of DSS during the frame is 0x0). The occurrence of synclost is dependent on the timing of setting the GO bit (that is DSS_VP_CONTROL[5] GOBIT to 1) vis-à-vis the disabling of the layer. If the “disable layer” MMR write operation and “set GO bit” MMR write operation happens within the same frame boundary, no synclost occurs. If the operations happen across the frame boundary, then synclost occurs (for one frame). The design automatically recovers and returns to normal operation from the next frame after GO bit is set, see Figure 3-1.

 Bug ConditionFigure 3-1 Bug Condition

Workaround(s):

A simple software workaround exists. In the workaround, prior to disabling a layer on the OVR, it is moved to the “non-visible” area of the OVR (for example: DSS_OVR_ATTRIBUTES_x[17-6] POSX = max_value_of_posx or DSS_OVR_ATTRIBUTES_x[30-19] POSY = max_value_of_posy). This avoids the synclost when the layer is disabled.

A sample software workaround pseudo-code is shown on Figure 3-2. In this case, the regular “disable layer” MMR write operation and “set GO bit set” MMR write operation are replaced with macros which implement the software workaround.

 Workaround Pseudo-codeFigure 3-2 Workaround Pseudo-code