4 Revision History
Changes from March 31, 2024 to April 30, 2025 (from Revision * (March 2024) to Revision A (April 2025))
- Added Advisory i2160; DDR: Valid VRef Range Must be Defined During
LPDDR4 Command Bus TrainingGo
- Updated Workaround for Advisory i2326; PCIe: MAIN_PLLx operating in
fractional mode, which is required for enabling SSC, is not compliant with PCIe
Refclk jitter limitsGo
- Added Usage Note i2330: DDRSS Register Configuration Tool
UpdatesGo
- Added Advisory i2419: Boot: When disabling deskew calibration, ROM
does not check if deskew calibration was enabledGo
- Added Usage Note i2424; PLL: PLL Programming Sequence May Introduce
PLL InstabilityGo
- Added Advisory i2431; BCDMA: RX Channel can lockup in certain
scenariosGo
- Added Advisory i2436; BCDMA: BCDMA RX_IGNORE_LONG setting in RX CHAN
CFG register doesn't workGo
- Added Advisory i2457: Boot: Missing data in UART transfer causes
boot failuresGo
- Added Advisory i2478; MMCSD0: HS400 Mode not
supportedGo