TIDUD61E October 2020 – April 2021
Figure 2-8 shows a simplified diagram of a single phase of the interleaved TTPL PFC topology. To control this rectifier the duty cycle is controlled to regulate the voltage directly. This regulation is possible if the software variable Duty or D is set so that when it is equal to 1, Q3 is always ON, and the setting makes the voltage equal to the Vbus voltage. When Duty is set to 0, Q3 never turns on, and Q4 is always connected to , which makes the voltage go to 0.