TIDUFC1
November 2025
1
Description
Resources
Features
Applications
6
1
System Description
1.1
Key System Specifications
2
System Overview
2.1
Block Diagram
2.2
Design Considerations
2.3
Highlighted Products
2.3.1
ADS127L21B
2.3.2
REF81
2.3.3
REF54
2.3.4
RES21A
2.3.5
THP210
2.3.6
OPA828
3
System Design Theory
3.1
Range Selection
3.2
Linearity and Low-Noise Signal Chain
3.3
Calibration
3.4
Additional System Design Considerations
4
Hardware, Software, Testing Requirements, and Test Results
4.1
Hardware Description
4.1.1
PCB Interface
4.1.2
Input Multiplexer
4.1.3
Gain Multiplexer
4.1.4
Power Supplies
4.1.5
Clock Tree
4.2
Software Requirements
4.3
Test Setup
4.4
Test Results
4.4.1
Integral Nonlinearity Measurements
4.4.2
Noise Simulation
4.4.3
Noise Measurements
4.4.4
Conclusion
5
Design and Documentation Support
5.1
Design Files
5.1.1
Schematics
5.1.2
BOM
5.2
Tools
5.3
Documentation Support
5.4
Support Resources
5.5
Trademarks
6
About the Author
Features
Ultra-low drift, low-noise reference for calibrating the entire signal chain, enabling high dc accuracy post-calibration
Three input ranges: ±100mV, ±1V, ±10V
Linearity: 1.1ppm maximum (±10V range)
Noise: 335nV
RMS
at 60SPS (±10V range)