TIDUFC1 November   2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 ADS127L21B
      2. 2.3.2 REF81
      3. 2.3.3 REF54
      4. 2.3.4 RES21A
      5. 2.3.5 THP210
      6. 2.3.6 OPA828
  9. 3System Design Theory
    1. 3.1 Range Selection
    2. 3.2 Linearity and Low-Noise Signal Chain
    3. 3.3 Calibration
    4. 3.4 Additional System Design Considerations
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Description
      1. 4.1.1 PCB Interface
      2. 4.1.2 Input Multiplexer
      3. 4.1.3 Gain Multiplexer
      4. 4.1.4 Power Supplies
      5. 4.1.5 Clock Tree
    2. 4.2 Software Requirements
    3. 4.3 Test Setup
    4. 4.4 Test Results
      1. 4.4.1 Integral Nonlinearity Measurements
      2. 4.4.2 Noise Simulation
      3. 4.4.3 Noise Measurements
      4. 4.4.4 Conclusion
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
    2. 5.2 Tools
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author

4.1.4 Power Supplies

External ±15V power supplies power the PCB. Figure 4-5 shows the power tree. The ±15V power supplies directly power REF81, OPA828, TPS7A39, TPS7A47, MUX36S08, and TMUX6104. The reference design is fitted with 36V diodes D5, D6, and D7. These diodes allow for ±16.5V bipolar power supplies, which is the maximum recommended operating voltage for TMUX6104.

TPS7A39 generates ±2.75V (AVDD and AVSS) power rails to supply THP210, ADS127L21B, and REF54. TPS7A47 generates a 2.5V power rail that supplies IOVDD to ADS127L21B. Install JP2 in the 1–2 position and use J20 to supply an external IOVDD rail.

TIDA-010970 Power Tree SchematicFigure 4-5 Power Tree Schematic