TIDUFC3 January   2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Power Topology
      2. 2.2.2 PCB and Form Factor
      3. 2.2.3 Antenna
    3. 2.3 Highlighted Products
      1. 2.3.1 AWRL6432BGAMFQ1
      2. 2.3.2 TCAN3404DDFRQ1
      3. 2.3.3 TPS65036x-Q1
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
      1. 3.1.1 Getting Started With Hardware
        1. 3.1.1.1 Power Up Option
      2. 3.1.2 Sense-on-Power (SOP)
      3. 3.1.3 AWRL6432 Initialization: Board Programming
    2. 3.2 Test Setup
    3. 3.3 Test Results
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
      3. 4.1.3 Layout Prints
      4. 4.1.4 Altium Project
      5. 4.1.5 Gerber Files
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author

2.2.1 Power Topology

The reference design works in a power-optimized mode power topology with 3.3V IO support. In this mode, the device is powered by using three rails (3.3V, 1.8V, and 1.2V). The Derby PMIC (TPS65036x-Q1) has three step-down converters which provides the three rails. These converters operate in forced PWM mode; however, can be configured to operate in AutoPFM mode.

TIDEP-01037 Power Topology Figure 2-2 Power Topology