TIDUFC3 January 2025
The AWRL6432 device has three different boot mode (SOP mode) configurations, Application mode (Functional mode), Device management mode [Quad Serial Peripheral Interface (QSPI) flashing mode], and Debug mode (Development mode). Exercise the SOP mode configurations in Table 3-1 first. After the correct SOP mode is set, an nRESET must be issued to register the SOP setting.
Connector pins J1.8 and J1.7 are dedicated for SOP0 and SOP1, respectively. By default, SOP0 is pulled high and SOP1 is pulled low in the reference design. Therefore, the device boots up in Application (Functional) mode when J1.8 and J1.7 are not connected externally. Connect J1.8 to GND to switch the device to Device management mode (QSPI flashing mode). Similarly, connect the J1.7 to VCC_3V3 to switch the device to Debug Mode (Development mode).
| SOP MODE | PMIC_CLK_OUT, TDO | COMBINATION (SOP1, SOP0) | CONNECTION REQUIRED FOR SOP1 | CONNECTION REQUIRED FOR SOP0 |
|---|---|---|---|---|
| SOP_MODE1 | Device management mode (QSPI flashing mode) | 00 | NC | GND |
| SOP_MODE2 | Application mode (Functional mode) | 01 | NC | NC |
| SOP_MODE4 | Debug Mode (Development mode) | 11 | VCC_3V3 | NC |