SDLS967E May   2016  – November 2022 LSF0108-Q1

PRODMIX  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics (Translating Down), VGATE = 3.3 V
    7. 6.7  Switching Characteristics (Translating Down), VGATE = 2.5 V
    8. 6.8  Switching Characteristics (Translating Up), VGATE = 3.3 V
    9. 6.9  Switching Characteristics (Translating Up), VGATE = 2.5 V
    10. 6.10 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Auto Bidirectional Voltage Translation
      2. 8.3.2 Output Enable
      3. 8.3.3 Wettable Flanks
    4. 8.4 Device Functional Modes
      1. 8.4.1 Up and Down Translation
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 I2C PMBus, SMBus, GPIO
        1. 9.2.1.1 Design Requirements
          1. 9.2.1.1.1 Enable, Disable, and Reference Voltage Guidelines
          2. 9.2.1.1.2 Bias Circuitry
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Bidirectional Translation
          2. 9.2.1.2.2 Pull-Up Resistor Sizing
          3. 9.2.1.2.3 LSF0108-Q1 Bandwidth
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Mixed-Mode Voltage Translation
        1. 9.2.2.1 Single Supply Translation
        2. 9.2.2.2 Voltage Translation for Vref_B < Vref_A + 0.8 V
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • AEC-Q100 qualified with the following results:
    • Device HBM ESD classification level 2000-V
    • Device CDM ESD classification level 1000-V
  • Available in wettable flank VQFN (RKS) package

  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100 MHz up translation and greater than 100 MHz down translation at ≤ 30-pF capacitive load and up to 40 MHz up or down translation at 50-pF capacitive load
  • Supports hot insertion
  • Allow bidirectional voltage level translation between
    • 0.95 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V
    • 1.2 V ↔ 1.8 V, 2.5 V, 3.3 V, 5 V
    • 1.8 V ↔ 2.5 V, 3.3 V, 5 V
    • 2.5 V ↔ 3.3 V, 5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5-V tolerance I/O port to support TTL
  • Low ron provides less signal distortion
  • High-impedance I/O pins for EN = low
  • Flow-through pinout for easy PCB trace routing
  • Latch-up performance exceeds 100 mA per JESD 17
  • –40°C to +125°C operating temperature range
Functional Block Diagram