Packaging information
| Package | Pins WQFN (RTE) | 16 |
| Operating temperature range (°C) -40 to 85 |
| Package qty | Carrier 250 | SMALL T&R |
Features for the ADS7128
- Small package size:
- 3-mm × 3-mm WQFN
- 8 channels configurable as any
combination of:
- Up to 8 analog inputs, digital inputs, or digital outputs
- GPIOs for I/O
expansion:
- Open-drain, push-pull digital outputs
- Analog
watchdog:
- Programmable thresholds per channel
- Event counter for transient rejection
- Wide operating ranges:
- AVDD: 2.35 V to 5.5 V
- DVDD: 1.65 V to 5.5 V
- –40°C to +85°C temperature range
- CRC for read/write operations:
- CRC on data read/write
- CRC on power-up configuration
- I2C interface:
- Up to 3.4 MHz (high-speed mode)
- 8 configurable I2C addresses
- Programmable averaging filters
- Root-mean-square
module:
- 16-bit true RMS output
- Programmable RMS time window
- Zero-crossing-detect module:
- ZCD output corresponding to any analog input
- Built-in transient rejection and hysteresis
- Digitally adjustable detection threshold
Description for the ADS7128
The ADS7128 is an easy-to-use, 8-channel, multiplexed, 12-bit, successive approximation register analog-to-digital converter (SAR ADC). The eight channels can be independently configured as either analog inputs, digital inputs, or digital outputs. The device has an internal oscillator for ADC conversion processes.
The ADS7128 communicates via an I2C-compatible interface and operates in either autonomous or single-shot conversion mode. The ADS7128 implements analog watchdog function by event-triggered interrupts per channel using a digital window comparator with programmable high and low thresholds, hysteresis, and an event counter. The ADS7128 has a built-in cyclic redundancy check (CRC) for data read/write operations and the power-up configuration. The ADS7128 features a root-mean-square (RMS) module that computes a 16-bit true RMS result for any analog input channel. The integrated zero-crossing-detect (ZCD) module allows for transient rejection and hysteresis near the configurable threshold crossings.