Product details


Number of input channels 8 Active supply current (Typ) (mA) 6 Supply voltage (Max) (V) 3.6 Operating temperature range (C) -40 to 85 Interface type Serial LVDS Features Analog Front End (AFE) open-in-new Find other Ultrasound AFEs

Package | Pins | Size

VQFN (RGC) 64 81 mm² 9 x 9 open-in-new Find other Ultrasound AFEs


  • Eight Variable-Gain Amplifiers (VGA)
    • Eight Differential Buffered Inputs With 2Vpp Maximum Swing
    • 5.5nV/√Hz VCA Input Noise (31dB Gain)
    • Variable Gain, –5dB to 31dB With 0.125dB or 1dB Steps
    • Digital Gain Control
  • Third-Order Antialiasing Filter With Programmable Cutoff Frequency (7.5, 10, or 14MHz)
  • Clamping
  • Analog-to-Digital Converter (ADC)
    • Octal Channel, 12Bit, 65MSPS
    • Internal and External Reference Support
    • No External Decoupling Required for References
    • Serial LVDS Outputs
  • 1.8V and 3.3V Supplies
  • 50mW Total Power per Channel at 30MSPS
  • 58mW Total Power per Channel at 50MSPS
  • 64QFN Package (9mm × 9mm)
    • Imaging: Ultrasound, PET
    • AFE5851: 16-Channel VGA + ADC, 32.5MSPS/Channel

open-in-new Find other Ultrasound AFEs


The AFE5801 is an analog front end, targeting applications where the power and level of integration are critical. The device contains eight variable-gain amplifiers (VGA), each followed by a high-speed (up to 65MSPS) ADC, for a total of eight ADCs per device.

Each of the eight differential inputs is buffered, accepts up to 2Vpp maximum input swing, and is followed by a VGA with a gain range from –5dB to 31dB. The VGA gain is digitally controlled, and the gain curves versus time can be stored in memory integrated within the device using the serial interface.

A selectable clamping and antialias low-pass filter (with 3dB attenuation at 7.5, 10, or 14MHz) is also integrated between VGA and ADC, for every channel.

The VGA/antialias filter outputs are differential (limited to 2Vpp) and drive the onboard 12bit, 65MSPS ADC. The ADC also scales down its power consumption should a lower sampling rate be selected. The ADC outputs are serialized in LVDS streams, which further minimizes power and board area.

The AFE5801 is available in a 64-pin QFN package (9mm × 9mm) and is specified over the full industrial temperature range (–40°C to 85°C).

open-in-new Find other Ultrasound AFEs

Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 9
Type Title Date
* Datasheet 8-Channel Variable-Gain Amplifier (VGA) With Octal High-Speed ADC datasheet (Rev. D) May 24, 2010
Technical articles Offset correction improves the next generation of heart-rate smart watches Aug. 24, 2015
User guide AFE5801 8-Channel Varable Gain Ampl w/Octal High-Speed ADC (Rev. B) Mar. 05, 2015
Technical articles JESD204B: Is it for you? Mar. 14, 2014
Technical articles A new way to illuminate the human condition Dec. 30, 2013
Technical articles Oximeter signaling: There’s more than meets the eye Dec. 04, 2013
User guide TSW1250EVM: High-Speed LVDS Deserializer and Analysis System (Rev. F) Jan. 20, 2012
More literature Ultrasound flyer (Rev. A) Sep. 22, 2011
More literature Ultrasound flyer Mar. 15, 2011

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development


The AFE5801 includes an 8-channel Voltage-Controlled-Amplifier (VCA) with digital control and an 8-channel 65MSPS analog-to-digital converter (ADC). The 8 analog input signals will be processed by the analog front-end circuit of AFE5801; the outputs of the analog front-end will then be digitalized (...)

  • Characterizes the AFE5805
  • Supports CW functionalities test
  • Provides 8 channel low-voltage differential signal (LVDS) outputs from the ADC
  • Compatible with the standard TI LVDS deserializer TSW1400EVM
  • Communicates with a personal computer (PC) through a USB interface
  • Configurable with RS-232 interface if (...)

Note: Consider using the TSW1400EVM for LVDS and CMOS ADC evaluation. This lower cost platform replaces the TSW1200 and TSW1250 and supports all the old and new ADC interfaces. A low cost TSW1405EVM is available for LVDS interfaces with a 64ksample memory limit.

The Texas Instruments TSW1250 EVM is (...)

  • Hardware and software effectively evaluates high-speed ADC with LVDS output
  • Xilinx 4 LX25 FPGA
  • 64k capture depth with USB transfer

Software development

SLOC150.ZIP (54810 KB)

Design tools & simulation

PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SLOC145.ZIP (30 KB)

CAD/CAE symbols

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VQFN (RGC) 64 View options

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