The AM1705 is a
low-power ARM microprocessor based on an ARM926EJ-S.
The device enables original-equipment manufacturers (OEMs) and original-design
manufacturers (ODMs) to quickly bring to market devices with robust operating systems, rich user
interfaces, and high processor performance through the maximum flexibility of a fully integrated,
mixed processor solution.
The ARM926EJ-S is a 32-bit RISC processor core that performs 32-bit or 16-bit
instructions and processes 32-, 16-, or 8-bit data. The core uses pipelining so that all parts of
the processor and memory system can operate continuously.
The ARM core has a coprocessor 15 (CP15), protection module, and data and program
memory management units (MMUs) with table look-aside buffers. The ARM core has separate 16KB of
instruction and 16-KB data caches. Both memory blocks are 4-way associative with virtual index
virtual tag (VIVT). The ARM core also has 8KB of RAM (Vector Table) and 64KB of ROM.
The peripheral set includes: a 10/100 Mbps Ethernet MAC (EMAC) with a management data
input/output (MDIO) module; two I2C Bus interfaces; three multichannel
audio serial ports (McASPs) with serializers and FIFO
buffers; two 64-bit general-purpose timers each configurable (one configurable as watchdog);
up to 8 banks of 16
pins of general-purpose input/output (GPIO) with programmable interrupt/event generation modes,
multiplexed with other peripherals; three UART interfaces (one with both RTS
and CTS); three enhanced high-resolution pulse width modulator (eHRPWM)
peripherals; three 32-bit enhanced capture (eCAP) module peripherals which can be configured as 3
capture inputs or 3 auxiliary pulse width modulator (APWM) outputs; two 32-bit enhanced quadrature
encoded pulse (eQEP) peripherals; and 2 external memory interfaces: an asynchronous and SDRAM
external memory interface (EMIFA) for slower memories or peripherals, and a higher speed memory
interface (EMIFB) for SDRAM.
The Ethernet Media Access Controller (EMAC) provides an efficient interface between the
device and the network. The EMAC supports both 10Base-T and 100Base-TX, or 10 Mbps and 100 Mbps in
either half- or full-duplex mode. Additionally, an MDIO interface is available for PHY
The I2C, SPI,
and USB2.0 ports allow the device to easily control
peripheral devices and/or communicate with host processors.
The rich peripheral set provides the ability to control external peripheral devices
and communicate with external processors. For details on each peripheral, see the related sections
later in this document and the associated peripheral reference guides.
The device has a complete set of development tools for the ARM processor. These tools
include C compilers and a Windows® debugger interface for visibility into source code