Product details

Number of channels (#) 6 Technology Family ACT Supply voltage (Min) (V) 4.5 Supply voltage (Max) (V) 5.5 Input type TTL-Compatible CMOS Output type Push-Pull Clock Frequency (Max) (MHz) 91 IOL (Max) (mA) 24 IOH (Max) (mA) -24 ICC (Max) (uA) 80 Features Balanced outputs, Very high speed (tpd 5-10ns), Positive input clamp diode
Number of channels (#) 6 Technology Family ACT Supply voltage (Min) (V) 4.5 Supply voltage (Max) (V) 5.5 Input type TTL-Compatible CMOS Output type Push-Pull Clock Frequency (Max) (MHz) 91 IOL (Max) (mA) 24 IOH (Max) (mA) -24 ICC (Max) (uA) 80 Features Balanced outputs, Very high speed (tpd 5-10ns), Positive input clamp diode
PDIP (N) 16 181 mm² 19.3 x 9.4 SOIC (D) 16 59 mm² 9.9 x 6
  • Inputs Are TTL-Voltage Compatible
  • Contain Six Flip-Flops With Single-Rail Outputs
  • Buffered Inputs
  • Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • ±24-mA Output Drive Current
    • Fanout to 15 F Devices
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015
  • Applications Include:
    • Buffer/Storage Registers
    • Shift Registers

  • Inputs Are TTL-Voltage Compatible
  • Contain Six Flip-Flops With Single-Rail Outputs
  • Buffered Inputs
  • Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • ±24-mA Output Drive Current
    • Fanout to 15 F Devices
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015
  • Applications Include:
    • Buffer/Storage Registers
    • Shift Registers

The ’ACT174 devices are positive-edge-triggered D-type flip-flops with a direct clear (CLR)\ input and are designed for 4.5-V to 5.5-V VCC operation.

Information at the data (D) inputs that meets the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.

The ’ACT174 devices are positive-edge-triggered D-type flip-flops with a direct clear (CLR)\ input and are designed for 4.5-V to 5.5-V VCC operation.

Information at the data (D) inputs that meets the setup time requirements is transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.

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Technical documentation

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Type Title Date
* Data sheet CD54ACT174, CD74ACT174 datasheet 09 Apr 2003
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
Application note Power-Up Behavior of Clocked Devices (Rev. A) 06 Feb 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
More literature Logic Cross-Reference (Rev. A) 07 Oct 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

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Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, DYY, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.

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PDIP (N) 16 View options
SOIC (D) 16 View options

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