CD74HC4015 High Speed CMOS Logic Dual 4-Stage Static Shift Registers | TI.com

CD74HC4015 (ACTIVE) High Speed CMOS Logic Dual 4-Stage Static Shift Registers

High Speed CMOS Logic Dual 4-Stage Static Shift Registers - CD74HC4015
Datasheet
 

Description

The ’HC4015 consists of two identical, independent, 4-stage serial-input/parallel-output registers. Each register has independent Clock (CP) and Reset (MR) inputs as well as a single serial Data input. "Q" outputs are available from each of the four stages on both registers. All register stages are D-type, master-slave flip-flops. The logic level present at the Data input is transferred into the first register stage and shifted over one stage at each positive- going clock transition. Resetting of all stages is accomplished by a high level on the reset line.

The device can drive up to 10 low power Schottky equivalent loads. The ’HC4015 is an enhanced version of equivalent CMOS types.

Features

  • Maximum Frequency, Typically 60MHz CL = 15pF, VCC = 5V, TA = 25°C
  • Positive-Edge Clocking
  • Overriding Reset
  • Buffered Inputs and Outputs
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V

Parametrics

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Part number Order Technology Family VCC (Min) (V) VCC (Max) (V) Voltage (Nom) (V) F @ nom voltage (Max) (MHz) ICC @ nom voltage (Max) (mA) tpd @ nom Voltage (Max) (ns) IOL (Max) (mA) IOH (Max) (mA) 3-state output Rating Operating temperature range (C)
CD74HC4015 Order now HC     2     6     6     28     0.08     37     5.2     -5.2     No     Catalog     -55 to 125    
CD54HC4015 Samples not available HC     2     6     6     28     0.08     37     5.2     -5.2     No     Military     -55 to 125