CD74HCT75 High Speed CMOS Logic Dual 2-Bit Bistable Transparent Latch | TI.com

CD74HCT75 (ACTIVE) High Speed CMOS Logic Dual 2-Bit Bistable Transparent Latch

High Speed CMOS Logic Dual 2-Bit Bistable Transparent Latch - CD74HCT75
Datasheet
 

Description

The ’HC75 and ’HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is controlled by separate Enable inputs (1E\ and 2E\) which are active LOW. When the Enable input is HIGH data enters the latch and appears at the Q output. When the Enable input (1E\ and 2E\) is LOW the output is not affected.

Features

  • True and Complementary Outputs
  • Buffered Inputs and Outputs
  • Fanout (Over Temperature Range)
    • Standard Outputs...10 LSTTL Loads
    • Bus Driver Outputs...15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

Data sheet acquired from Harris Semiconductor

Parametrics

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Part number Order Technology Family VCC (Min) (V) VCC (Max) (V) Bits (#) Voltage (Nom) (V) F @ nom voltage (Max) (MHz) ICC @ nom voltage (Max) (mA) tpd @ nom Voltage (Max) (ns) IOL (Max) (mA) IOH (Max) (mA) 3-state output Operating temperature range (C)
CD74HCT75 Order now HCT     4.5     5.5     4     5     25     0.04     35     4     -4     No     -55 to 125    
CD54HCT75 Samples not available HCT     4.5     5.5     4     4.5     25     0.04     35     4     -4     No     -55 to 125