DS110DF410

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8.5 to 11.3-Gbps quad channel retimer with adaptive EQ, CDR and DFE

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Data sheet

document-pdfAcrobat DS110DF410 Low Power Multi-Rate Quad Channel Retimer datasheet (Rev. D) PDF | HTML

DS110DF410

ACTIVE

Data sheet

Order now

Product details

Type

Retimer

Number of channels

4

Speed (max) (Gbpp)

11.3

Input compatibility

AC-coupling, CML

Protocols

10G-SR/LR, 40G-SR4/LR4, General purpose, Infiniband

Operating temperature range (°C)

-40 to 85

Type

Retimer

Number of channels

4

Speed (max) (Gbpp)

11.3

Input compatibility

AC-coupling, CML

Protocols

10G-SR/LR, 40G-SR4/LR4, General purpose, Infiniband

Operating temperature range (°C)

-40 to 85

WQFN (RHS)

48

49 mm² (7 mm × 7 mm)

Each Channel Independently Locks to Data Rates
from 8.5 to 11.3 Gbps and Sub-rates
Support for Subrates of Divide by 2/4/8
Fast Lock Operation Based on Protocol-Select
Mode
Low Latency (∼300ps)
Adaptive Equalization up to 34-dB Boost at 5 GHz
Adjustable Transmit V_OD: 600 to 1300 mVp-p
Adjustable Transmit De-emphasis to –12 dB
Typical Power Dissipation (EQ+DFE+CDR+DE):
180 mW/Channel
Programmable Output Polarity Inversion
Input Signal Detection, CDR Lock
Detection/Indicator
On-Chip Eye Monitor (EOM), PRBS Generator
Single 2.5-V ±5% Power Supply
SMBus/EEPROM Configuration Modes
Operating Temperature Range of –40 to 85°C
WQFN 48-Pin 7-mm × 7-mm Package
Easy Pin Compatible Upgrade Between Repeater
and Retimers
- DS100RT410 (EQ+CDR+DE): 10.3125 Gbps
- DS100DF410 (EQ+DFE+CDR+DE): 10.3125
  Gbps
- DS110RT410 (EQ+CDR+DE): 8.5 – 11.3 Gbps
- DS110DF410 (EQ+DFE+CDR+DE): 8.5 – 11.3
  Gbps
- DS125RT410 (EQ+CDR+DE): 9.8 – 12.5 Gbps
- DS125DF410 (EQ+DFE+CDR+DE): 9.8 – 12.5
  Gbps
- DS100BR410 (EQ+DE): Up to 10.3125 Gbps

Each Channel Independently Locks to Data Rates
from 8.5 to 11.3 Gbps and Sub-rates
Support for Subrates of Divide by 2/4/8
Fast Lock Operation Based on Protocol-Select
Mode
Low Latency (∼300ps)
Adaptive Equalization up to 34-dB Boost at 5 GHz
Adjustable Transmit V_OD: 600 to 1300 mVp-p
Adjustable Transmit De-emphasis to –12 dB
Typical Power Dissipation (EQ+DFE+CDR+DE):
180 mW/Channel
Programmable Output Polarity Inversion
Input Signal Detection, CDR Lock
Detection/Indicator
On-Chip Eye Monitor (EOM), PRBS Generator
Single 2.5-V ±5% Power Supply
SMBus/EEPROM Configuration Modes
Operating Temperature Range of –40 to 85°C
WQFN 48-Pin 7-mm × 7-mm Package
Easy Pin Compatible Upgrade Between Repeater
and Retimers
- DS100RT410 (EQ+CDR+DE): 10.3125 Gbps
- DS100DF410 (EQ+DFE+CDR+DE): 10.3125
  Gbps
- DS110RT410 (EQ+CDR+DE): 8.5 – 11.3 Gbps
- DS110DF410 (EQ+DFE+CDR+DE): 8.5 – 11.3
  Gbps
- DS125RT410 (EQ+CDR+DE): 9.8 – 12.5 Gbps
- DS125DF410 (EQ+DFE+CDR+DE): 9.8 – 12.5
  Gbps
- DS100BR410 (EQ+DE): Up to 10.3125 Gbps

The DS110DF410 is a four channel retimer with integrated signal conditioning. The device includes a fully adaptive Continuous-Time Linear Equalizer (CTLE), self calibrating 5-tap Decision Feedback Equalizer (DFE), Clock and Data Recovery (CDR), and transmit De-Emphasis (DE) driver to enable data transmission over long, lossy and crosstalk-impaired highspeed serial links to achieve BER < 1×10^–15.

Each channel can independently lock to data rates from 8.5 to 11.3 Gbps, and associated sub rates (div by 2, 4 and 8) to support a variety of communication protocols. A 25-MHz crystal oscillator clock is used to speed up the CDR lock process. This clock is not used for training the PLL and does not need to be synchronous with the serial data.

The programmable settings can be applied using the SMBus (I2C) interface, or they can be loaded via an external EEPROM. An on-chip eye monitor and a PRBS generator allow real-time measurement of high-speed serial data for system bring-up or field tuning.

The DS110DF410 is a four channel retimer with integrated signal conditioning. The device includes a fully adaptive Continuous-Time Linear Equalizer (CTLE), self calibrating 5-tap Decision Feedback Equalizer (DFE), Clock and Data Recovery (CDR), and transmit De-Emphasis (DE) driver to enable data transmission over long, lossy and crosstalk-impaired highspeed serial links to achieve BER < 1×10^–15.

Each channel can independently lock to data rates from 8.5 to 11.3 Gbps, and associated sub rates (div by 2, 4 and 8) to support a variety of communication protocols. A 25-MHz crystal oscillator clock is used to speed up the CDR lock process. This clock is not used for training the PLL and does not need to be synchronous with the serial data.

The programmable settings can be applied using the SMBus (I2C) interface, or they can be loaded via an external EEPROM. An on-chip eye monitor and a PRBS generator allow real-time measurement of high-speed serial data for system bring-up or field tuning.

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Technical documentation

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Top documentation	Type	Title	Format options	Date
*	Data sheet	DS110DF410 Low Power Multi-Rate Quad Channel Retimer datasheet (Rev. D)	PDF \| HTML	May 6, 2015
	Application note	Extend reach with Ethernet Redrivers and Retimers for 10G-12.5G Applications (Rev. A)		Jan 31, 2023
	Application note	Implementing TI Retimers on 10G ZR and DWDM SFP+ Optical Links		Apr 8, 2019
	Application brief	DS110DF111,DS125DF111, DS100DF410, DS110DF410, and DS125DF410 Programming Guide		Mar 25, 2019
	Application note	Understanding EEPROM Programming for 10G to 12.5G Retimers	PDF \| HTML	Jan 13, 2016
	Application note	Selecting TI SigCon Devices for SFF-8431 SFP+ Applications		May 6, 2014

Design & development

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Evaluation board

DS110DF410EVM — DS110DF410EVM: 8.5 to 11.3 Gbps Quad Channel Retimer with Adaptive EQ, CDR and DFE Evaluation Module

The DS110DF410EVM evaluation board allows the user to examine the advanced signal conditioning capabilities of the DS110DF410 and DS110RT410 devices using SMAs. The board is controlled by a PC using a USB port and the SigCon Architect GUI.

In order to use the SigCon Architect GUI to control the (...)

User guide: PDF

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