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The DS26C32A is a quad differential line receiver designed to meet the RS-422, RS-423, and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission, while retaining the low power characteristics of CMOS.
The DS26C32A has an input sensitivity of 200 mV over the common mode input voltage range of ±7V. The DS26C32A features internal pull-up and pull-down resistors which prevent output oscillation on unused channels.
The DS26C32A provides an enable and disable function common to all four receivers. It also features TRI-STATE outputs with 6 mA source and sink capability. This product is pin compatible with the DS26LS32A and the AM26LS32.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | DS26C32AT/DS26C32AM Quad Differential Line Receiver datasheet (Rev. C) | Apr 15, 2013 | |
| Application note | AN-903 A Comparison of Differential Termination Techniques (Rev. B) | Apr 26, 2013 |
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| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOIC (D) | 16 | Ultra Librarian |
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