The DS90C031 is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 155.5 Mbps (77.7 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology.
The DS90C031 accepts TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE® function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 11 mW typical.
The DS90C031 and companion line receiver (DS90C032) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | DS90C031 LVDS Quad CMOS Differential Line Driver datasheet (Rev. A) | May 14, 2004 | |
| Application brief | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | Aug 3, 2018 | ||
| Application brief | How to Terminate LVDS Connections with DC and AC Coupling | May 16, 2018 | ||
| Application note | AN-1110 LVDS Quad Dynamic I CC vs Frequency | May 15, 2004 | ||
| Application note | LVDS Signal Quality: Cable Drive Measurements using Eye Patterns Test Report #3 | May 15, 2004 | ||
| Application note | An Overview of LVDS Technology | Oct 5, 1998 |
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| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOIC (D) | 16 | Ultra Librarian |
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