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The DS90C365A is a pin to pin compatible replacement for DS90C363, DS90C363A and DS90C365. The DS90C365A has additional features and improvements making it an ideal replacement for DS90C363, DS90C363A and DS90C365. family of LVDS Transmitters.
The DS90C365A transmitter converts 21 bits of LVCMOS/LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over the fourth LVDS link. Every cycle of the transmit clock 21 bits RGB of input data are sampled and transmitted. At a transmit clock frequency of 87.5 MHz, 21 bits of RGB data and 3 bits of LCD timing and control data (FPLINE, FPFRAME, DRDY) are transmitted at a rate of 612.5 Mbps per LVDS data channel. Using a 87.5 MHz clock, the data throughput is 229.687 Mbytes/sec. This transmitter can be programmed for Rising edge strobe or Falling edge strobe through a dedicated pin. A Rising edge or Falling edge strobe transmitter will interoperate with a Falling edge strobe FPDLink Receiver without any translation logic.
This chipset is an ideal means to solve EMI and cable size problems associated with wide, high-speed TTL interfaces with added Spead Spectrum Clocking support..
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | DS90C365A 3.3V Prog LVDS Transm 18-Bit FPD Link-87.5 MHz datasheet (Rev. I) | Apr 12, 2013 | |
| Application note | High-Speed Layout Guidelines for Reducing EMI for LVDS SerDes Designs | Nov 9, 2018 | ||
| Application note | How to Map RGB Signals to LVDS/OpenLDI(OLDI) Displays (Rev. A) | Jun 29, 2018 | ||
| Application note | AN-1032 An Introduction to FPD-Link (Rev. C) | Aug 8, 2017 | ||
| Application note | Receiver Skew Margin for Channel Link I and FPD Link I Devices | PDF | HTML | Jan 13, 2016 | |
| Application note | TFT Data Mapping for Dual Pixel LDI Application - Alternate A - Color Map | May 15, 2004 | ||
| Application note | AN-1056 STN Application Using FPD-Link | May 14, 2004 | ||
| Application note | AN-1085 FPD-Link PCB and Interconnect Design-In Guidelines | May 14, 2004 |
For additional terms or required resources, click any title below to view the detail page where available.
The FPD-Link evaluation kit includes a transmitter (Tx) board, a receiver (Rx) board and interfacing cables. This kit shows the chipsets interfacing from test equipment or a graphics controller using low-voltage differential signaling (LVDS) to a receiver board.
The transmitter board accepts (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| TSSOP (DGG) | 48 | Ultra Librarian |
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