The DS90UR907Q-Q1 converts FPD-Link to FPD-Link II. It translates four LVDS data/control
streams and one LVDS clock pair (FPD-Link) into a high-speed serialized interface (FPD-Link II)
over a single pair. This serial bus scheme greatly eases system design by eliminating skew problems
between clock and data, reduces the number of connector pins, reduces the interconnect size,
weight, and cost, and overall eases PCB layout. In addition, internal DC balanced encoding is used
to support AC-coupled interconnects.
The DS90UR907Q-Q1 converts, balances and level shifts four LVDS data/control streams, and
embeds one LVDS clock pair (FPD-Link) to a serial stream (FPD-Link II). Up to 24 bits of RGB in the
FPD-Link are serialized along with the three video control signals.
Serial transmission is optimized by a user selectable de-emphasis and differential output
level select features. EMI is minimized by the use of low voltage differential signaling and spread
spectrum clocking compatibility.
With fewer wires to the physical interface of the host, FPD-Link input with LVDS
technology is ideal for high speed, low power and low EMI data transfer.
The device is offered in a 36-pin WQFN package and is specified over the automotive
AEC-Q100 Grade 2 temperature range of –40°C to 105°C.