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Product details

Parameters

Function Serializer Power consumption (mW) 475 Data rate (Max) (Gbps) 2.97 Control interface Pin/SMBus Operating temperature range (C) -40 to 85 open-in-new Find other Serial digital interface (SDI) ICs

Package | Pins | Size

WQFN (RHS) 48 49 mm² 7 x 7 open-in-new Find other Serial digital interface (SDI) ICs

Features

  • LVDS Interface to Host FPGA
  • No External VCO or Clock Ref Required
  • Integrated Variable Output Cable Driver
  • 3.3V SMBus Configuration Interface
  • Integrated TXCLK PLL Cleans Clock Noise
  • Small 48-Pin WQFN Package
  • Industrial Temperature range: -40°C to 85°C

Key Specifications

  • Output Compliant With SMPTE 424M, SMPTE 292M, SMPTE 259M-C and DVB-ASI
  • Typical Power Dissipation: 440 mW
  • 30 ps Typical Output Jitter (HD, 3G)

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Description

The LMH0340/0040/0070/0050 SDI Serializers are part of TI’s family of FPGA-Attach SER/DES products supporting 5-bit LVDS interfaces with FPGAs. An FPGA Host will format data with supplied IP such that the output of the LMH0340 is compliant with the requirements of DVB-ASI, SMPTE 259M-C, SMPTE 292M and SMPTE 424M standards. See for details on which Standards are supported per device.

The interface between the SER (Serializer) and the FPGA consists of a 5 bit wide LVDS data bus, an LVDS clock and an SMBus interface. The LMH0340/0040/0070 SER devices include an integrated cable driver which is fully compliant with all of the SMPTE specifications listed above. The LMH0050 has a CML output driver that can drive a differential transmission line or interface to a cable driver.

The FPGA-Attach SER/DES family is supported by a suite of IP which allows the design engineer to quickly develop video applications using the SER/DES products. The SER is packaged in a physically small 48-pin WQFN package.

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet LMH0340/040/070/050 3Gbps, HD, SD, DVB-ASI SDI Serializr & Cable Drvr w/LVDS I/F datasheet (Rev. I) Apr. 16, 2013
Selection guides Broadcast and Professional Video Interface Solutions (Rev. E) Apr. 05, 2017
Application notes AN-1943 Understanding Serial Digital Video Bit Rates (Rev. A) Apr. 26, 2013
Application notes AN-1972 Board Layout Challenges in Serial Digital Interface (Rev. C) Apr. 26, 2013
Application notes AN-1988 LMH0340 / LMH0341 SerDes Family LVDS Timing Overview (Rev. A) Apr. 26, 2013
Application notes AN-2145 Power Considerations for SDI Products (Rev. B) Apr. 26, 2013
Application notes AN-2146 Power Design for SDI and Other Noise-Sensitive Devices (Rev. A) Apr. 26, 2013
Application notes Triple Rate SDI IP FPGA Resource Utilization on SDXILEVK/AES-EXP-SDI-G Ref Dsgn (Rev. A) Apr. 26, 2013
User guides SDALTEVK HSMC SDI Adapter board Mar. 05, 2012
User guides Triple-Rate SDI and Video Clocking Daughter Card Jan. 26, 2012
Application notes High-Speed Board Layout Challenges in FPGA/SDI Sub-Systems Nov. 12, 2009
Application notes DS25CP104 in 3G SDI Router Application Aug. 20, 2008
Application notes A 3 Gbps SDI Connectivity Solution Supporting Uncompressed 1080p60 Video Mar. 18, 2008
User guides Broadcast Video Owner's Manual Nov. 17, 2006

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Software development

CODE EXAMPLES & DEMOS Download
Broadcast video support code for LVDS interface SDI SerDes
BROADCAST_VIDEO_SERDES_IP We have developed a family of serializers and deserializers intended to support the serial digital interface (SDI) standards of the Society of Motion Picture and Television Engineers (SMPTE). These devices connect to a host FPGA through a moderate speed, moderate width (600 Mbps, 5 bits wide (...)

Design tools & simulation

SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide

CAD/CAE symbols

Package Pins Download
WQFN (RHS) 48 View options

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